Betriebssysteme · Institut für Systemarchitektur · Fakultät Informatik · TU Dresden



19. 12. 2013

Adding SMP Support to a User-Level VMM


Markus Partheymüller

TU Dresden

Verteidigung der Diplomarbeit

Virtualization is a well-known technique to facilitate a variety of use cases in both desktop and server environments. Increasingly, security becomes an important aspect of virtualization because it allows for consolidating multiple workloads on a single physical machine in a protected manner. Recent processor development shifted from increasing single-core performance to integrating multiple cores onto one chip, resulting from the physical limits imposed on the design of microprocessors. It was only a question of time until virtualization followed this trend and supported running several virtual machines truly in parallel, at first multiple single-core ones, then even virtual multi-core. In the full virtualization solution of the TU Dresden, the NOVA OS Virtualization Architecture (NOVA), SMP is only supported in the first variant, while multiple CPUs of a guest system have to share the same physical core. The goal of this thesis is to explore how this limitation can be eliminated with maximum efficiency, passing on as much available compute power to the guest as possible. By identifying and enhancing the critical synchronization mechanisms inside the VMM, the presented solution accounts for maximum scalability in the current environment while keeping the modifications modular and maintainable. A detailed evaluation of the intermediate implementations justifies the final solution and an outlook shows opportunities for improving and extending the virtual multiprocessor support in NOVA.

19. 12. 2013

Memory and Thread Management on NUMA Systems


Daniel Müller

TU Dresden

Verteidigung der Diplomarbeit

NUMA (non-uniform memory access) architectures are increasingly used in commodity systems in order to allow for higher application performance. Contrary to the "free lunch" software developers had with increasing processor clock-rates, where software performance improved without programmer intervention, harnessing the full power of a NUMA architecture requires knowledge about the system's topology and more sophisticated thread and memory-placement algorithms.

This talk presents my work of making the L4/Fiasco.OC environment NUMA-aware. I explain chosen design details and implementation issues of a component that handles thread and memory placement on a NUMA system so as to alleviate remote memory access penalties and shared resource contention. Using L4Re mechanisms, the component is able to dynamically migrate threads and allocated memory regions between different NUMA nodes without modification of the target applications.
26. Jun 2018
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