Betriebssysteme · Institut für Systemarchitektur · Fakultät Informatik · TU Dresden |
|
27. 02. 2015Improving Microkernel Construction through Hardware Transactional MemoryTill SmejkalTU DresdenIn this talk, I determine and discuss whether a novel technique for parallel programming called hardware transactional memory can influence the design and construction of a microkernel. Hardware transactional memory allows programmers to define regions in their code as critical, which are then executed by the processor in a transactional fashion. This means, that this section is executed atomically (It either runs until completion or not at all.) and in full isolation (It is not possible for any other processor core to read memory values written within this section.). Using these properties, I reworked the IPC system call of the Fiasco.OC microkernel. My implementation not only reduces the code complexity of the IPC path, but also improves the overall performance of it up to a factor of four, compared to the original version. 27. 02. 2015IPC Message Logging and ReplayingSven DziadekTU DresdenTo circumvent the transitive restart of all dependent processes, an IPC message logging and replaying mechanism is presented. Our approach logs all Inter-Process-Communication (IPC) messages between the last checkpoint and a possible crash. If a crash occurs, the last checkpoint is loaded and the server receives the messages from the log to bring the server into a consistent state with its clients. After the server application has reached the point in execution where it failed, the following IPC messages are logged and forwarded to the other applications again. |
28. Oct 2020
|
|
· Copyright © 2001-2022 Operating Systems Group, TU Dresden | Impressum · |