In the real-time domain, it must provide formal guarantees that the system will respond in time. This ensures, for instance, that the Airbag will inflate in time, and the ABS brake will unblock the wheels as specified, so that it performs as designed, improving safety and driving experience. Another aspect, which must be accounted for, is the reliability. Will the Airbag actually work as predicted even in the presence of errors? Regarding computing systems, hardware and software must work together to provide reliable service. Applying multicores to the real-time domain increases substantially the computing power, allowing integration of several and more complex functions in a single chip. On the other hand, it also introduces several challenges, such as how to guarantee worst-case response times in such a dynamic system. In this talk, we address the design of an essential, central part of a multi-core system, the Network-on-Chip (NoC), with respect to reliability. The NoC must cope with soft errors (transient faults in hardware) with low overhead while still being predictable and reliable.
Designing a Reliable Network-on-Chip for Real-Time Systems
Sondertermin: 13:00 Uhr, APB 3105