|Betriebssysteme · Institut für Systemarchitektur · Fakultät Informatik · TU Dresden|
27. 11. 2015
Integration and Management of Automatically Generated Hardware Accelerators on the Linux OS
Verteidigung der Diplomarbeit
Accelerating things in hardware usually meant to build specialised hardware that does special tasks faster and hence more efficiently than a general purpose CPU. However, developing and building hardware is a expensive task. Additionally, needing to have a specialised circuit for every specialised task one might encounter is not perfect at all.
The gap between CPUs and concrete ICs is closed by FPGAs, Field Programmable Gate Arrays. These are microchips that can be programmed, and that not like a CPU is programmed, but the effective wiring of the chip can be modified. This allows rather cheap development and prototyping of hardware that will be actually built as an IC later, but also promises a flexible way to accelerate even exotic tasks. However, programming FPGAs still requires a decent understanding of hardware design. Various research projects exist to make programming FPGAs easier by automating it.
One example for such a research project is the GCC plugin written by Gerald Hempel at the Embedded Systems chair of TU Dresden. This GCC plugin operates on unmodified C source code and not only generates a software executable, but also tries to identify loops that make good candidates for hardware acceleration on an FPGA and outputs an FPGA programming for those loops.
These automatically generated software and hardware accelerators are currently intended to run on bare-metal, hence with full control over the hardware, no memory protection and no virtual memory management.
In this work I will implement a framework to integrate those hardware accelerators into a generic Linux system. This framework will provide a mechanism to automatically load the adjacent bitfiles when executing a program having accelerators and a kernel driver to access these accelerators from userland.
23. Oct 2019
|· Copyright © 2001-2019 Operating Systems Group, TU Dresden | Impressum ·|