segment.h

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/*
 * (c) 2008-2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
 *     economic rights: Technische Universität Dresden (Germany)
 *
 * License: see LICENSE.spdx (in this directory or the directories above)
 */
/*****************************************************************************/
#ifndef __L4_SYS__ARCH_X86__SEGMENT_H__
#define __L4_SYS__ARCH_X86__SEGMENT_H__
 
#ifndef L4API_l4f
#error This header file can only be used with a L4API version!
#endif
 
#include <l4/sys/ipc.h>
 
L4_INLINE long
fiasco_ldt_set(l4_cap_idx_t task, void *ldt, unsigned int num_desc,
               unsigned int entry_number_start, l4_utcb_t *utcb);
 
L4_INLINE long
fiasco_gdt_set(l4_cap_idx_t thread, void *desc, unsigned int size,
               unsigned int entry_number_start, l4_utcb_t *utcb);
 
L4_INLINE unsigned
fiasco_gdt_get_entry_offset(l4_cap_idx_t thread, l4_utcb_t *utcb);
 
enum L4_task_ldt_x86_consts
{
  L4_TASK_LDT_X86_ENTRY_SIZE = 8,
  L4_TASK_LDT_X86_MAX_ENTRIES
    = (L4_UTCB_GENERIC_DATA_SIZE - 2)
      / (L4_TASK_LDT_X86_ENTRY_SIZE / (L4_MWORD_BITS / 8)),
};
enum L4_task_ldt_x86_consts {…};
 
L4_INLINE long
fiasco_amd64_set_fs(l4_cap_idx_t thread, l4_umword_t base, l4_utcb_t *utcb);
 
enum L4_sys_segment
{
  L4_AMD64_SEGMENT_FS = 0,
  L4_AMD64_SEGMENT_GS = 1
};
enum L4_sys_segment {…};
 
L4_INLINE long
fiasco_amd64_set_segment_base(l4_cap_idx_t thread, enum L4_sys_segment segr,
                              l4_umword_t base, l4_utcb_t *utcb);
 
L4_INLINE long
fiasco_amd64_segment_info(l4_cap_idx_t thread, unsigned *user_ds,
                          unsigned *user_cs, unsigned *user32_cs,
                          l4_utcb_t *utcb);
 
/*****************************************************************************
 *** Implementation
 *****************************************************************************/
 
#include <l4/sys/task.h>
#include <l4/sys/thread.h>
 
L4_INLINE long
fiasco_ldt_set(l4_cap_idx_t task, void *ldt, unsigned int num_desc,
               unsigned int entry_number_start, l4_utcb_t *utcb)
{
  if (num_desc > L4_TASK_LDT_X86_MAX_ENTRIES)
    return -L4_EINVAL;
  l4_utcb_mr_u(utcb)->mr[0] = L4_TASK_LDT_SET_X86_OP;
  l4_utcb_mr_u(utcb)->mr[1] = entry_number_start;
  __builtin_memcpy(&l4_utcb_mr_u(utcb)->mr[2], ldt,
                   num_desc * L4_TASK_LDT_X86_ENTRY_SIZE);
  return l4_error_u(l4_ipc_call(task, utcb, l4_msgtag(L4_PROTO_TASK, 2 + num_desc * 2, 0, 0), L4_IPC_NEVER), utcb);
}
fiasco_ldt_set(l4_cap_idx_t task, void *ldt, unsigned int num_desc, {…}
 
L4_INLINE unsigned
fiasco_gdt_get_entry_offset(l4_cap_idx_t thread, l4_utcb_t *utcb)
{
  l4_utcb_mr_u(utcb)->mr[0] = L4_THREAD_X86_GDT_OP;
  if (l4_error_u(l4_ipc_call(thread, utcb, l4_msgtag(L4_PROTO_THREAD, 1, 0, 0), L4_IPC_NEVER), utcb))
    return -1;
  return l4_utcb_mr_u(utcb)->mr[0];
}
fiasco_gdt_get_entry_offset(l4_cap_idx_t thread, l4_utcb_t *utcb) {…}
 
L4_INLINE long
fiasco_amd64_segment_info(l4_cap_idx_t thread, unsigned *user_ds,
                          unsigned *user_cs, unsigned *user32_cs,
                          l4_utcb_t *utcb)
{
  l4_msg_regs_t *m = l4_utcb_mr_u(utcb);
  int r;
 
  m->mr[0] = L4_THREAD_AMD64_GET_SEGMENT_INFO_OP;
 
  r = l4_error_u(l4_ipc_call(thread, utcb, l4_msgtag(L4_PROTO_THREAD, 1, 0, 0),
                             L4_IPC_NEVER), utcb);
  if (r < 0)
    return r;
 
  *user_ds   = m->mr[0];
  *user_cs   = m->mr[1];
  *user32_cs = m->mr[2];
 
  return 0;
}
fiasco_amd64_segment_info(l4_cap_idx_t thread, unsigned *user_ds, {…}
 
#endif /* ! __L4_SYS__ARCH_X86__SEGMENT_H__ */