idt.h

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// AUTOMATICALLY GENERATED -- DO NOT EDIT!         -*- c++ -*-

#ifndef idt_h
#define idt_h

#include "idt_init.h"
#include "initcalls.h"
#include "kmem.h"
#include "mem_layout.h"
#include "types.h"
#include "x86desc.h"

//
// INTERFACE definition follows 
//

/*
 * Fiasco Interrupt Descriptor Table (IDT) Code
 */


class Idt_entry : public X86desc
{

public:  
  inline Idt_entry();
  
  // interrupt gate
  inline Idt_entry(Address entry, Unsigned16 selector, Unsigned8 access);
  
  // task gate
  inline Idt_entry(Unsigned16 selector, Unsigned8 access);
  
  inline void clear();
  
  inline Address offset();
  
  inline Unsigned8 word_count();
};

class Idt
{
  friend class Jdb_kern_info_bench;
public:
  // idt entries for 0x20 CPU exceptions, 0x10 IRQs, 7 syscalls,
  // 0x3e/0x3f for APIC exceptions
  static const unsigned _idt_max = 0x40;
private:
  static const Address  _idt = Mem_layout::Idt;

public:  
  static FIASCO_INIT void init_table(Idt_init_entry *src);
  
  static FIASCO_INIT void init();
  
  static void set_entry(unsigned vector, Address entry, bool user);
  
  static inline Address idt();
  
  static inline void set(Pseudo_descriptor *desc);
  
  static inline void get(Pseudo_descriptor *desc);
  
  static void set_timer_vector_run(void);
  
  static void set_timer_vector_stop(void);

private:  
  static void set_writable(bool writable);
};

//
// IMPLEMENTATION of inline functions (and needed classes)
//




inline Idt_entry::Idt_entry()
{}


// interrupt gate

inline Idt_entry::Idt_entry(Address entry, Unsigned16 selector, Unsigned8 access)
{
  _data.i._offset_low  = entry & 0x0000ffff;
  _data.i._selector    = selector;
  _data.i._zero        = 0;
  _data.i._access      = access | Access_present;
  _data.i._offset_high = (entry & 0xffff0000) >> 16;
}


// task gate

inline Idt_entry::Idt_entry(Unsigned16 selector, Unsigned8 access)
{
  _data.t._selector    = selector;
  _data.t._access      = access | Access_present;
  _data.t._avail1      = 0;
  _data.t._avail2      = 0;
  _data.t._avail3      = 0;
}



inline void
Idt_entry::clear()
{
  _data.r = 0;
}



inline Address
Idt_entry::offset()
{
  return idt_entry_offset();
}



inline Unsigned8
Idt_entry::word_count()
{
  return _data.i._zero;
}



inline Address
Idt::idt()
{
  return _idt;
}


inline void
Idt::set(Pseudo_descriptor *desc)
{
  asm volatile ("lidt %0" : : "m" (*desc));
}



inline void
Idt::get(Pseudo_descriptor *desc)
{
  asm volatile ("sidt %0" : "=m" (*desc) : : "memory");
}

#endif // idt_h

---