pci.h

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// AUTOMATICALLY GENERATED -- DO NOT EDIT!         -*- c++ -*-

#ifndef pci_h
#define pci_h

#include "types.h"

//
// INTERFACE definition follows 
//


class Pci
{
  enum
  {
    Cfg_addr = 0xcf8,
    Cfg_data = 0xcfc,
  };

public:  
  static inline Unsigned8 read_cfg8(Mword bus, Mword dev, Mword subdev, Mword reg);
  
  static inline Unsigned16 read_cfg16(Mword bus, Mword dev, Mword subdev, Mword reg);
  
  static inline Unsigned32 read_cfg32(Mword bus, Mword dev, Mword subdev, Mword reg);
  
  static inline void write_cfg8(Mword bus, Mword dev, Mword subdev, Mword reg, Unsigned8 v);
  
  static inline void write_cfg16(Mword bus, Mword dev, Mword subdev, Mword reg, Unsigned16 v);
  
  static inline void write_cfg32(Mword bus, Mword dev, Mword subdev, Mword reg, Unsigned32 v);
};

//
// IMPLEMENTATION includes follow (for use by inline functions)
//


#include "io.h"

//
// IMPLEMENTATION of inline functions (and needed classes)
//




inline Unsigned8
Pci::read_cfg8(Mword bus, Mword dev, Mword subdev, Mword reg)
{
  Io::out32 (((bus    & 0xffff) << 16) |
             ((dev    &   0x1f) << 11) |
             ((subdev &   0x07) <<  8) |
             ((reg    &   0xff)      ) |
             1<<31, Cfg_addr);
  return Io::in8 (Cfg_data + (reg & 3));
}



inline Unsigned16
Pci::read_cfg16(Mword bus, Mword dev, Mword subdev, Mword reg)
{
  Io::out32 (((bus    & 0xffff) << 16) |
             ((dev    &   0x1f) << 11) |
             ((subdev &   0x07) <<  8) |
             ((reg    &   0xfe)      ) |
             1<<31, Cfg_addr);
  return Io::in16 (Cfg_data + (reg & 2));
}



inline Unsigned32
Pci::read_cfg32(Mword bus, Mword dev, Mword subdev, Mword reg)
{
  Io::out32 (((bus    & 0xffff) << 16) |
             ((dev    &   0x1f) << 11) |
             ((subdev &   0x07) <<  8) |
             ((reg    &   0xfc)      ) |
             1<<31, Cfg_addr);
  return Io::in32 (Cfg_data);
}



inline void
Pci::write_cfg8(Mword bus, Mword dev, Mword subdev, Mword reg, Unsigned8 v)
{
  Io::out32 (((bus    & 0xffff) << 16) |
             ((dev    &   0x1f) << 11) |
             ((subdev &   0x07) <<  8) |
             ((reg    &   0xff)      ) |
             1<<31, Cfg_addr);
  Io::out8 (v, Cfg_data + (reg & 3));
}



inline void
Pci::write_cfg16(Mword bus, Mword dev, Mword subdev, Mword reg, Unsigned16 v)
{
  Io::out32 (((bus    & 0xffff) << 16) |
             ((dev    &   0x1f) << 11) |
             ((subdev &   0x07) <<  8) |
             ((reg    &   0xfe)      ) |
             1<<31, Cfg_addr);
  Io::out16 (v, Cfg_data + (reg & 2));
}



inline void
Pci::write_cfg32(Mword bus, Mword dev, Mword subdev, Mword reg, Unsigned32 v)
{
  Io::out32 (((bus    & 0xffff) << 16) |
             ((dev    &   0x1f) << 11) |
             ((subdev &   0x07) <<  8) |
             ((reg    &   0xfc)      ) |
             1<<31, Cfg_addr);
  Io::out32 (v, Cfg_data);
}

#endif // pci_h

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