Deterministic scheduling with local APIC

[Jacob Gorm Hansen]

On Wed, Feb 05, 2003 at 09:09:35AM -0800, Uwe Dannowski wrote:
> If you want to account time, then why are you interested in counting 
> instructions executed? I believe the number of instructions is more or less 
> irrelevant (unless you want to schedule other resources than just time).
> 
> You can use the IA-32 processors' performance counters to enforce an 
> interrupt (or an NMI) after a certain number of events, be it cycles, 
> instructions, memory accesses, FPU ops ... If you care just about user 
> time, you can configure them to count only when executing in user mode.

This sounds perfect,

I need to control exactly how many instructions a thread gets per time
slice, no matter how many interrupts arrive at the CPU in the mean time,
so that scheduling becomes deterministic. If a thread is interrupted by
a hardware interrupt after fx half its time slice, I need to know
exactly how many instructions it has already run, and need to be able to
grant it exactly what is missing after the interrupt has been processed
by the kernel.

If I can do this I should be able to guarantee that two user programs
running on two machines, receiving the exact same input, will be in the
exact same state at the same (logical) point in time. That means one
will be able to take over from another in case of failure.

It seems to me one could augment one of the IA32 L4 implementations with
this functionality, connect two machines with some kind of FIFO link, a
good hub which sends all packets to both of them, and have failover
solved at full speed, without need to rewrite any user level software.

Maybe this has already been done though. But as always the use of a
microkernel seems to make things simpler.

> Uwe

best,
Jacob