UX question
Nicholas Mc Guire
der.herr at hofr.at
Thu Dec 6 11:16:39 CET 2007
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Hi !
latest svn (as of yesterday) booting ux with the default hello module
ends up in jdb and it seems like nither "g" nor "^" nor control-C
will kill the beast :)
any way out, aside from switching consoles and trampling on fiasco ?
some details:
root 11705 25.2 3.3 66704 7512 pts/0 S+ 13:48 1:41 ./fiasco
- -I hello
root 11706 0.0 0.0 0 0 pts/0 Z+ 13:48 0:00 [hello]
<defunct>
so the hello that happily prints on the real-hw seems to be dead under UX
(seems well reproducible)
After CNTRL-C I end at:
debian:/home/l4/tudos/ux_test# ./fiasco -I hello
<snip>
Loading Module 0x00100000-0x00109380 [sigma0]
Loading Module 0x00110000-0x002ae000 [roottask]
Bootstrapping...
Welcome to Fiasco(ux)!
DD-L4(v2)/ia32 microkernel (C) 1998-2007 TU Dresden
Rev: r247 compiled with gcc 4.1.2 for Intel Pentium []
CPU: AuthenticAMD (F:4F:2:0) Model: Unknown CPU at 1803 MHz
32/512 Entry I TLB (4K pages) 8 Entry I TLB (4M pages)
32/512 Entry D TLB (4K pages) 8 Entry D TLB (4M pages)
64 KB L1 I Cache (2-way associative, 64 bytes per line)
64 KB L1 D Cache (2-way associative, 64 bytes per line)
256 KB L2 U Cache (8-way associative, 64 bytes per line)
Freeing init code/data: 24576 bytes (6 pages)
Calibrating timer loop...
- --Interception--------------------------------------ESP:200007a8
EIP:000ceaf6
(0.00) jdb: t
thread: 0.00 <00000000> prio: 00 mcp: ff mode: Con
state: 001 ready
wait for: polling: rcv descr:
lcked by: ---.-- timeout :
cpu time: 0 timeslice: 100000/100000 s
pager : ---.-- cap: ---.-- utcb: 00000000
preemptr: ---.-- not monitored ready lnk: ???.?? ???.??
prsnt lnk: 0.00 0.00
EAX=00000000 ESI=00000000 DS=007b
EBX=00000000 EDI=00000000 ES=007b je 0xceae0
ECX=00000000 EBP=63efc000 GS=0000 mov 0xa0(%ebp),%esi
EDX=00000000 ESP=200007a8 SS=0000
trap 1 (Debug), error 00000000, from kernel mode
CS=0000 EIP=000ceaf6 EFlags=00000246
200007a8 00000000 00000246 00096b24 20000000 00000000 00000000 000cd5f6 00000000
7c0 200007cc 20000000 000cd7ba 00015540 00000000 00000000 00000000 00000000
7e0 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
t/bt/l etc. shows only one task and that task is marked ready.
any hint ?
thx!
hofrat
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