IPC and Multiple Execution Models

Espen Skoglund esk at ira.uka.de
Mon Apr 30 11:54:45 CEST 2007

[Jonathan S Shapiro]
> On amd64 (and other architectures), multiple execution models are
> supported by the hardware. In the case of amd64, both 64-bit and
> 32-bit applications can be supported simultaneously.

> IPC across models presents some problems.

>   When sending from 32-bit to 64-bit, registers are widened (good),
>   but differences in alignment rules can mean that the 64-bit
>   receiver and the 32-bit sender do not agree about the number and
>   lengths of indirect strings.

>   When sending from 64-bit to 32-bit, registers are truncated, and
>   there can be difficulties with indirect strings because of
>   differing alignment requirements.

There are no problems with string IPC between 32-bit and 64-bit
threads since the maximum string length is 4MB in both cases (see
'string length' description in Section 5.4 of L4 X.2 reference
manual), and the number of message registers and buffer registers are
also the same.


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