memory problems on Fiasco porting
tsaitungchieh at gmail.com
Wed Feb 11 14:44:55 CET 2009
I'm working on porting Fiasco to an ARM(922T) platform.
Currently, I can get into kernel debugger, and successfully
leave the `Calibrating timer loop'. But then I stuck in
Thread::init_workload, fail to create sigma0_thread. ARM
processor would raise a data abort exception and then
It seems failed because trying to load an illegal virtual
address at 0xc0080004, which doing this at :
I guess the problem maybe becuase some architecture
porting part still has problem, or because the sigma0_task
create for sigma0_thread setting wrong memory space,
because I've some memory space setting incorrect.
Honestly, I don't know where setting the virtual address
translation for 0xd0000000 ~ 0xc0000000(_tcbs_1 to
phys_offset), is this range use for each thread's tcb ?
And where can I get more information about Fiasco's
memory layout? for example, what does Mem_layout::Tcbs
and Mem_layout::User_max means? which range of memory
is used for specific purpose, for example, I/O device(seems
is 0xef100000 ~ ) ?
Any advice is appreciate. Thanks.
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