The implementation of CPU reservation server
sean0920 at gmail.com
Sun May 31 19:57:46 CEST 2009
Now I am tracing the source code of cpu reservation server in
l4/pkg/cpu_reserve directory. And I got several questions...
1. The bottom of cpu reservation server is implemented by
l4_rt_add_timeslice(), l4_rt_set_period(), l4_rt_begin_strictly_periodic()
functions. And these functions are defined in
which calls l4_rt_generic() function.
Function l4_rt_generic() is implemented by inline assembly, and it seems to
call the system call "thread_schedule".
Because these functions only appears in ARCH-x86 directory, do they
support on ARM architecture?
If not, how can I implement similar behaviors of these functions?
Where can I find the document about the L4 system call API ? I can't
really understand the behavior of these functions.
2. When system contains three user threads, I want to control Fiasco
scheduler not to schedule one thread in these three threads during one time
interval. How can I implement it?
The simplest way seems to control this thread into un-running state. How
can I achieve this by a supervisal server?
I'm sorry for my poor English and lengthy question.
I'm glad if you give me some hints or corrections.
Thanks a lot!
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the l4-hackers