The implementation of CPU reservation server

Udo A. Steinberg udo at hypervisor.org
Sun May 31 20:32:33 CEST 2009


On Mon, 1 Jun 2009 01:57:46 +0800 Sean (S) wrote:

S> Function l4_rt_generic() is implemented by inline assembly, and it seems
S> to call the system call "thread_schedule".

Indeed.

S>      Because these functions only appears in ARCH-x86 directory, do they
S> support on ARM architecture?

Currently these functions are available on x86 only.

S>      If not, how can I implement similar behaviors of these functions?
S>      Where can I find the document about the L4 system call API ? I can't
S> really understand the behavior of these functions.


The API is described in my diploma thesis, see
http://os.inf.tu-dresden.de/papers_ps/steinberg-diplom.pdf

You would have to extend the kernel ABI (e.g., which parameters are passed
in which registers) for ARM to be able to use these extensions. Note that
the real-time scheduling code in Fiasco is quite dated. No one has used or
maintained it in the last 5 years.

S> 2. When system contains three user threads, I want to control Fiasco
S> scheduler not to schedule one thread in these three threads during one
S> time interval. How can I implement it?
S>     The simplest way seems to control this thread into un-running state.
S> How can I achieve this by a supervisal server?

I suggest you read the aforementioned PDF document first. It describes how
you can control thread execution with periods, deadlines and release times.

Cheers,

	- Udo
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