Fiasco.OC on amd64 Opteron 6000

Daniel Waddington d.waddington at
Sat Mar 12 00:46:57 CET 2011

I'm trying to run Fiasco.OC amd64 build on an Opteron 6100 magny-cours 
series (4-way-SMP, 12-cores-per-chip).  When it boots it is as if the 
scheduling interrupt on the local APIC is not getting set up correctly.  
It also warns about some errata.  It does boot with MP disabled, and RTC 
for the scheduling - not much use on a 48-core machine though ;-)

Any clues??? Thanks,

Per_cpu_data_alloc: (orig: 0xfffffffff0080840-0xfffffffff0081498)
Allocate 3160 bytes (3KB) for CPU[43] local storage (offset=fc887c0)
OSVW_MSR1 = 0x000000000000000c
#Errata known 4, affected by at least one
Allocate cpu_mem @ 0xffffffffffd0b000
Local APIC[19]: version=10 max_lvt=5
APIC ESR value before/after enabling: 00000000/00000000
Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling
CPU[43:25]: AuthenticAMD (10:9:1:0)[00100f91] Model: Unknown CPU at 2200 

   32/512 Entry I TLB (4K pages)     16 Entry I TLB (4M pages)
   48/512 Entry D TLB (4K pages)     48/128 Entry D TLB (4M pages)
   64 KB L1 I Cache (2-way associative, 64 bytes per line)
   64 KB L1 D Cache (2-way associative, 64 bytes per line)
  512 KB L2 U Cache (8-way associative, 64 bytes per line)
10240 KB L3 U Cache (13-way associative, 64 bytes per line)

CPU[43]: goes to idle loop

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