[l4linux+ankh] no eth0

Timur galiullintimur at gmail.com
Sun Mar 25 15:02:23 CEST 2012


Hi all,
i,m trying to bind l4linux to ankh. After launching with attached config 
files, l4linux doesn't see eth0 interface.  What am i doing wrong? Log 
attached.

[modules.list]
entry L4Linux-mag-x86
roottask moe rom/l4lx-gfx.cfg
module l4re
module ned
module l4lx-gfx.cfg
module io
module ankh
module ankh.vbus
module fb-drv
module mag
module x86-legacy.devs
module l4lx-x86.io
module vmlinuz
module drops-rd.rd


-- 
Galiullin Timur
-------------- next part --------------
-- vim:set ft=lua:

loader = L4.default_loader;

local lxname = "vmlinuz";
if L4.Info.arch() == "arm" then
  lxname = "vmlinuz.arm";
end

-- Start io

vbus_l4linux = loader:new_channel();
vbus_input   = loader:new_channel();
vbus_fbdrv   = loader:new_channel();
ankh_vbus    = loader:new_channel();

loader:start(
  {
    caps = {
      sigma0  = L4.cast(L4.Proto.Factory, L4.Env.sigma0):create(L4.Proto.Sigma0);
      icu     = L4.Env.icu;
      input   = vbus_input:svr();
      l4linux = vbus_l4linux:svr();
      fbdrv   = vbus_fbdrv:svr();
      ankh    = ankh_vbus:svr();      
    },
  }, "rom/io rom/x86-legacy.devs rom/l4lx-x86.io rom/ankh.vbus");

-- Start fb-drv (but only if we need to)
local fb = L4.Env.vesa;
if (not fb) then
  fb = loader:new_channel();
  loader:start({ caps = { fb = fb:svr(), vbus = vbus_fbdrv }},
               "rom/fb-drv -m 0x117");
end

local mag_mag = loader:new_channel();
local mag_svc = loader:new_channel();

-- Start mag
loader:start(
  {
    caps = {
      vbus = vbus_input;
      mag  = mag_mag:svr();
      svc  = mag_svc:svr();
      fb   = fb;
    },
  }, "rom/mag");

local ankh_clnt = loader:new_channel();
local ankh_shm = loader:create_namespace({});

loader:startv(
  {
	caps = {
      	  ankh_service = ankh_clnt:svr(); 
  	  vbus         = ankh_vbus,               
 	  shm          = ankh_shm:m("rws")
	},      
	log  = {"ankh", "g"}, 
    	l4re_dbg = L4.Dbg.Warn, 
  },  "rom/ankh" ); 


-- Start Linux
loader:start(
  { caps = {
      log = L4.Env.log:m("rws"),
      fb  = mag_svc:create(L4.Proto.Goos, "g=640x480");
      vbus = vbus_l4linux;
      shm = ankh_shm:m("rws");
      ankh = ankh_clnt:create(0, "debug,phys_mac,shm=shm,device=eth0,bufsize=16384,create"); 
    },
    l4re_dbg = L4.Dbg.Warn,
    log = { "l4linux", "yellow" },
  },
--  "rom/" .. lxname .. " mem=64M l4ankh.ankh_shm=shm console=tty0 l4x_rd=rom/ramdisk-" ..  L4.Info.arch() .. ".rd root=1:0 ramdisk_size=20000 init=/bin/sh");
  "rom/" .. lxname .. " mem=64M l4ankh.ankh_shm=shm console=tty0 l4x_rd=rom/drops-rd.rd root=1:0 ramdisk_size=20000 init=/bin/sh");



-------------- next part --------------
ankh => new System_bus()
{
        PCI0 => new PCI_bus()
        {
                nic[] => wrap(hw-root.match("PCI/CC_02"));
        }
} 
-------------- next part --------------
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