Questions about IO-APIC
Chen Tian
chen.tian at acm.org
Sat Jul 28 18:29:31 CEST 2012
So I should use the interrupt pin field at offset 0x3c to find out which
PCI link the device uses. Can I use this value directly to search IO-APIC
GSI in _PRT blocks? I read some article that says this value may be local
to PCI device, and it may be remapped by motherboard to another PCI link
number through something like daisy chain type of mapping. For example, PCI
slot 1's INTA# uses INTA#, while PCI slot 2's INTA# actually uses INTB#.
Is this true? If so, I think I need to handle this mapping before search
_PRT blocks, right?
For GSI number, I assume it is the irq number I am looking for. But I still
have some questions. First, is it always fixed for each pin of each
IO-APIC? For example, first pin of first IO-APIC has GSI 0, second pin has
1, ..., and the first pin of second IO-APIC has GSI 24, second pin has 25,
...? If so, then irq number will range from 0 to 47 on a two-io-apic
machine. But Linux runs on the same machine can report irq 53 for some
device, which is very confusing to me.
Second, some document says GSI number can be overridden. When booting
Fiasco.OC, I can see a line like ovr[0] 2->0. Does that mean GSI 2
eventually become irq 0? I am not sure when and why a GSI number needs to
be overridden, but can the overriding happen to the device I am
interested? If so, how should I deal with it in my device driver, i.e.,
should I use the original GSI number as my device's irq or use the one
after overriding?
Look forward to your reply. I am so eager to know the answers. Thanks.
Best,
Chen
On Sat, Jul 28, 2012 at 7:11 AM, Udo Steinberg <udo at hypervisor.org> wrote:
> On Sat, 28 Jul 2012 07:44:10 -0700 Chen Tian (CT) wrote:
>
> CT> Thanks for the reply. Then what is the irq number that is assigned to
> an
> CT> io-apic pin? When writing a driver for a PCi device, how can I use the
> CT> value in pci irq field to find the right irq no. for this device so I
> can
> CT> call attach function in driver?
>
> I assume you mean the value in the PCI interrupt line field at offset 0x3c
> in the configuration space? That value has no meaning when the IOAPIC is
> used.
>
> What you need to do instead is parse _PRT blocks of the ACPI DSDT table to
> figure out which IOAPIC pin each device is connected to. Here's an example:
>
> Name (AH02, Package (0x04)
> {
> Package (0x04)
> {
> 0xFFFF, // PCI address of the device
> 0x00, // PCI LINK A
> 0x00,
> 0x1D // IOAPIC GSI 29
> },
>
> Package (0x04)
> {
> 0xFFFF,
> 0x01, // PCI LINK B
> 0x00,
> 0x29 // IOAPIC GSI 41
> },
>
> Package (0x04)
> {
> 0xFFFF,
> 0x02, // PCI LINK C
> 0x00,
> 0x28 // IOAPIC GSI 40
> },
>
> Package (0x04)
> {
> 0xFFFF,
> 0x03, // PCI LINK D
> 0x00,
> 0x2A // IOAPIC GSI 42
> }
> })
>
> Depending on which of the PCI interrupt lines (A-D) the device is
> configured
> to use, it will either generate GSI 29, 41, 40, or 42. In this case the
> machine has multiple IOAPICs, each with 24 pins, so for example GSI 29
> would
> be the 6th pin on the second IOAPIC.
>
> Cheers,
> Udo
>
> _______________________________________________
> l4-hackers mailing list
> l4-hackers at os.inf.tu-dresden.de
> http://os.inf.tu-dresden.de/mailman/listinfo/l4-hackers
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://os.inf.tu-dresden.de/pipermail/l4-hackers/attachments/20120728/21ba93c8/attachment.htm>
More information about the l4-hackers
mailing list