Fiasco.OC with ARM TrustZone

Adam Lackorzynski adam at
Thu Jun 6 00:04:55 CEST 2013


On Wed Jun 05, 2013 at 17:23:30 +0800, Chao-Jui Chang wrote:
> After I change the memory to 1023, it runs but stops at
> ###
> Timer for CPU0 is at IRQ 28
> Calibrating timer loop...

Stopping there typically means that the timer isn't ticking.
Looking at your output below, I wondering if you really have selected
extgic mode, as the UART irq should be different in that case. On the
other side it should not make a difference.
> By the way, how to turn on the module loading information during booting?

Probably wrong UART selected in bootstrap. Check
l4/pkg/bootstrap/server/src/platform/ and set uart_nr to 1.

> The latest snapshot and svn only prints message starting from "Hello from
> Startup::stage2"
> ### Start cur ###
> Exynos4412 # run fiasco
> Partition1: Start Address(0x1000), Size(0x32000)
> reading bootstrap.raw
> 803080 bytes read
> Boot with zImage
> Starting kernel ...
> Hello from Startup::stage2
> Number of IRQs available at this GIC: 160
> FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p:
> dbl/sngl
> Watchdog initialized
> SERIAL ESC: allocated IRQ 305 for serial uart
> Not using serial hack in slow timer handler.
> Welcome to Fiasco.OC (arm)!

Adam                 adam at

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