Run and debug Fiasco.OC kernel and L4Re using a DSTREAM JTAG device and the ARM DS-5 IDE

Mahdi Aichouch foxmehdi at gmail.com
Fri Nov 14 15:33:50 CET 2014


Hello to everyone,

I have a Freescale i.MX 6 ARM Cortex A9 Sabre SD board.
I would like to test the Hello World example using the generated
bootstrap.elf binary.
I compiled the fiasco kernel and the l4re framework for the i.MX 6 ARM
Cortex-A9 using the menu configuration in both cases.

Instead of using an SD card to run the binary on the board, I would like to
flash the RAM with the binary using the DSTREAM JTAG device and the ARM
DS-5 IDE.

I connected the board to my host using the mini-usb to serial cable, and I
used minicom tool as a serial terminal.

I tried to run the binary using the DS-5 debugger while the board is
connected through JTAG, but I didn't see any debug message on the serial
terminal.

The source code I am using is from the "l4re-snapshot-2014092821".

My questions:

1) Does anyone tried to run and debug fiasco kernel + l4re on a board using
a JTAG device?
What are the steps that I am missing?
2) The debug tool print a message saying that "WARNING(IMG53):
bootstrap.elf has no source level debug information", what are the options
required to include these information compiling the fiasco kernel + l4re?

Thank you very much in advance.

Best regards,
Mehdi

PS: screenshot of the IDE debugger view
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