Question about ARM LPAE

Adam Lackorzynski adam at os.inf.tu-dresden.de
Wed Mar 30 01:02:40 CEST 2016


Hi,

On Mon Mar 28, 2016 at 23:05:41 +0800, li94575 wrote:
> >On Fri Mar 25, 2016 at 22:27:33 +0800, li94575 wrote:
> >> hi Adam,
> >> At 2016-03-25 06:41:45, "Adam Lackorzynski" <adam at os.inf.tu-dresden.de> wrote:
> >> >
> >> >With the current 32bit setup the second part won't be accessible as it
> >> >goes beyond the 4GB space. Making this memory usable on 32bit could be
> >> >done with some (very hacky) changes but commonly thoughts are that such
> >> >an effort would be better spent for 64bit that does not have any such
> >> >limitations.
> 
> Could you tell me where I need to change? I have modified the memory initialization in sigma0, and
> addeda new memory region (from 0x100000000 to 0x13fffffff) on the avl tree. However, it does
> not seem to work, because the page fault address is 32 bit (fpage also cann't hold 64-bit address),
> I wonder if I revise the wrong place.

The size of an fpage is one thing to solve but far not the only one.
Maybe an fpage can be changed to describe larger addresses (with other
trade-offs) or sigma0 could use a different way/protocol to talk to the
kernel. With that one could get to the memory above 4G through sigma0
(the sigma0 protocol for clients would probably also need some review
regarding larger addresses). Would that be enough for your use case?



Adam
-- 
Adam                 adam at os.inf.tu-dresden.de
  Lackorzynski         http://os.inf.tu-dresden.de/~adam/



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