Extending l4sys by reading/writing register values of a preempted thread

Denis Huber huber.denis at mytum.de
Mon Mar 13 12:36:32 CET 2017


Dear L4 hackers community,


I want to implement a new syscall for getting/setting stored register 
values of a specific thread (identified by its cap).

Preliminary note: I'm using the ARM architecture.

Before implementing the syscall, I need to better understand the 
kernel-part of Fiasco.OC. Can you help me answer the following questions 
and point me to the source code regarding each question:

* Where (in the source code) are threads preempted and their register 
state stored?
* Where is the register state of a thread loaded to the CPU and the 
thread started (e.g. after a preempt)?
* Where is the register state stored of each thread?
* How can I introspect the stored thread register of a thread in the 
kernel debugger JDB?
** My thoughts: Is it K<kobj_ptr> with kobj_ptr of the thread and the 3 
lines beginning with PC=...?
e.g.
"
PC=010579cc USP=200ffdb0                smlatbeq	r9, r0, r2, r5
[0] 00000003 000010c0 00218003 00000000 tsteq000r5, ip, rrx
[8] 200ffdb0 200ffe40 01086ef0 200ffe98 [c] 200ffef8 010579cc fffffff8 
20000010
"

I also have another, short, off-topic question:
* How can I introspect the capability space of a task inside the kernel 
debugger?


Kind regards,
Denis



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