Access ARM Data Fault Address Register (System Control Register) in Fiasco.OC
adam at os.inf.tu-dresden.de
Thu Jan 25 23:37:05 CET 2018
On Thu Jan 25, 2018 at 16:32:25 +0000, Stark, Josef wrote:
> in Fiasco.OC we have a function inside src/kernel/foc/l4/pkg/l4sys/include/thread.h
> > L4_INLINE l4_msgtag_t
> > l4_thread_ex_regs_ret(l4_cap_idx_t thread, l4_addr_t *ip, l4_addr_t *sp,
> > l4_umword_t *flags) L4_NOTHROW;
> which allows us for a given thread (capability ID) to read its general purpose registers, SP and IP.
> Is there a similar function (if not, how could I achieve it) to access the ARM A9 System
> control registers or, to be more precise, the Data Fault Address Register (DFAR)  of
> a thread?
> I tried creating a function similar to the above mentioned, but modified the body to do this:
> > unsigned int v;
> > asm volatile ("mrc p15, 0, %[v], c6, c0, 0" : [v]"=r"(v) :: );
> and then write v back to the caller. But this just made the whole system hang.
> Any ideas? Thanks in advance!
This MRC is a privileged instruction and cannot be called in user-level.
If for whatever reason you need to know DFAR (why?), you need to do the
mrc in the kernel and have an interface to retrieve it from there.
Taking any security considerations aside, add another function to L4::Thread
(Thread_object in the kernel) to get the value, it's an easy option.
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