L4Re – L4 Runtime Environment
vbus_pci
1 // vi:ft=cpp
2 /*
3  * (c) 2014 Sarah Hoffmann <sarah.hoffmann@kernkonzept.com>
4  *
5  * This file is part of TUD:OS and distributed under the terms of the
6  * GNU General Public License 2.
7  * Please see the COPYING-GPL-2 file for details.
8  */
9 
10 #pragma once
11 
12 #include <l4/vbus/vbus>
13 #include <l4/vbus/vbus_pci.h>
14 
21 namespace L4vbus {
22 
27 class Pci_host_bridge : public Device
28 {
29 public:
42  l4_uint32_t *value, l4_uint32_t width) const
43  {
44  return l4vbus_pci_cfg_read(bus_cap().cap(), _dev, bus,
45  devfn, reg, value, width);
46  }
47 
48 
61  l4_uint32_t value, l4_uint32_t width) const
62  {
63  return l4vbus_pci_cfg_write(bus_cap().cap(), _dev, bus,
64  devfn, reg, value, width);
65  }
66 
67 
81  int irq_enable(l4_uint32_t bus, l4_uint32_t devfn, int pin,
82  unsigned char *trigger, unsigned char *polarity) const
83  {
84  return l4vbus_pci_irq_enable(bus_cap().cap(), _dev, bus,
85  devfn, pin, trigger, polarity);
86  }
87 
88 };
89 
90 
95 class Pci_dev : public Device
96 {
97 public:
108  l4_uint32_t width) const
109  {
110  return l4vbus_pcidev_cfg_read(bus_cap().cap(), _dev, reg, value, width);
111  }
112 
113 
124  l4_uint32_t width) const
125  {
126  return l4vbus_pcidev_cfg_write(bus_cap().cap(), _dev, reg, value, width);
127  }
128 
129 
139  int irq_enable(unsigned char *trigger, unsigned char *polarity) const
140  {
141  return l4vbus_pcidev_irq_enable(bus_cap().cap(), _dev, trigger, polarity);
142  }
143 
144 };
145 
146 }
Device on a L4vbus::Vbus.
Definition: vbus:76
L4::Cap< Vbus > bus_cap() const
Access the Vbus capability of the underlying virtual bus.
Definition: vbus:87
l4vbus_device_handle_t _dev
The device handle for this device.
Definition: vbus:226
A PCI device.
Definition: vbus_pci:96
int cfg_write(l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) const
Write to the device's vPCI configuration space.
Definition: vbus_pci:123
int cfg_read(l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) const
Read from the device's vPCI configuration space.
Definition: vbus_pci:107
int irq_enable(unsigned char *trigger, unsigned char *polarity) const
Enable the device's PCI interrupt.
Definition: vbus_pci:139
A Pci host bridge.
Definition: vbus_pci:28
int cfg_read(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) const
Read from the vPCI configuration space using the PCI root bridge.
Definition: vbus_pci:41
int irq_enable(l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity) const
Enable PCI interrupt for a specific device using the PCI root bridge.
Definition: vbus_pci:81
int cfg_write(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) const
Write to the vPCI configuration space using the PCI root bridge.
Definition: vbus_pci:60
unsigned int l4_uint32_t
Unsigned 32bit value.
Definition: l4int.h:40
int l4vbus_pci_cfg_write(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)
Write to the vPCI configuration space using the PCI root bridge.
int l4vbus_pcidev_irq_enable(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, unsigned char *trigger, unsigned char *polarity)
Enable the device's PCI interrupt.
int l4vbus_pci_cfg_read(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)
Read from the vPCI configuration space using the PCI root bridge.
int l4vbus_pci_irq_enable(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity)
Enable PCI interrupt for a specific device using the PCI root bridge.
int l4vbus_pcidev_cfg_write(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)
Write to the device's vPCI configuration space.
int l4vbus_pcidev_cfg_read(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)
Read from the device's vPCI configuration space.
C++ interface of the Vbus API.
Definition: vbus:42