[ Class Overview ]
Use of timer modules in PCs
To provide counters and timers, PCs have one or two timer modules of the type 5253 or 8254. Originally, these were separate modules on the mainboard, but now they are usually integrated in the southbridge. Each of these components has three 16-bit wide counters that are operated at a clock speed of 1.19318 MHz – the counting speed is therefore independent of the processor clock.
| PIT | Counter | Usage |
|---|---|---|
| 1 | 0 | Periodic interrupts |
| 1 | 1 | Memory refresh |
| 1 | 2 | Sound generation |
| 2 | 0 | Fail-Safe-Timer (NMI) |
| 2 | 1 | Unused |
| 2 | 2 | Unused |
Each counter has its own output (OUTx). These are permanently connected to various components on the mainboard, resulting in the special meanings of the counters. Thus OUT0 leads to INT0 of the PIC, OUT1 to the channel 0 input of the DMA controller 8237, OUT2 to the amplifier via a programmable gate and OUT0 of the second PIT to the NMI input of the processor (via the NMI mask bit).
Timer programming
Each PIT can be accessed by using four ports:
| Port (1.PIT) | Port (2.PIT) | Register | Access modes |
|---|---|---|---|
| 0x40 | 0x48 | Counter 0 | write/read |
| 0x41 | 0x49 | Counter 1 | write/read |
| 0x42 | 0x4a | Counter 2 | write/read |
| 0x43 | 0x4b | Control register | write only |
All ports are only 8 bits wide. A special technique is used to get 16-bit counter values into the PIT. First, the PIT must be told via a control byte what we want from it in the first place. The control byte has the following layout:
| Bit(s) | Value | Meaning |
|---|---|---|
| 6–7 | Counter selection | |
| 00 | Counter 0 | |
| 01 | Counter 1 | |
| 10 | Counter 2 | |
| 11 | invalid on 8253, read-back command on 8254 | |
| 4–5 | read/write | |
| 00 | Counter latch command | |
| 01 | Only low-order counter byte | |
| 10 | Only high-order counter byte | |
| 11 | Low-order, then high-order counter byte | |
| 1–3 | Mode 0 to mode 5 | |
| 000 | Single interrupt | |
| 001 | Single interrupt with hardware control | |
| 010 | Periodic interrupt | |
| 011 | Square wave signal generator | |
| 100 | Software controlled interrupt | |
| 101 | Hardware controlled interrupt | |
| 0 | Counting format | |
| 0 | Binary counting of 16 bits | |
| 1 | Counting with four-digit BCD numbers | |
The counter latch command and the read back command are only of interest for reading counter values. Therefore, they will not be discussed further here.
The mode determines how the counter works and whether it triggers external events with the help of the OUTx line. Thus, in mode 0, the counter counts down from the specified start value with 838 ns per step to 0 and sets the OUTx line to 1 at the end. To generate periodic pulses, mode 2 is best suited. In this case, a short pulse is put on OUTx when the value 0 is reached. Afterwards, the counter is automatically reinitialised with the original start value, after which the process starts again from the beginning.
To set a 16-bit counter value, three out commands are necessary. The first one to transfer the control byte and two more commands with the lower and the higher byte of the counter value.