00001
00006 #ifndef __L4SYS__INCLUDE__ARCH_ARM__L4API_L4V2__SYSCALLS_H__
00007 #define __L4SYS__INCLUDE__ARCH_ARM__L4API_L4V2__SYSCALLS_H__
00008
00009 #include <l4/sys/syscalls_gen.h>
00010
00011 #ifdef __GNUC__
00012
00013 #ifndef L4_SYSCALL_MAGIC_OFFSET
00014 # define L4_SYSCALL_MAGIC_OFFSET 8
00015 #endif
00016 #define L4_SYSCALL_ID_NEAREST (-0x00000008-L4_SYSCALL_MAGIC_OFFSET)
00017 #define L4_SYSCALL_FPAGE_UNMAP (-0x0000000C-L4_SYSCALL_MAGIC_OFFSET)
00018 #define L4_SYSCALL_THREAD_SWITCH (-0x00000010-L4_SYSCALL_MAGIC_OFFSET)
00019 #define L4_SYSCALL_THREAD_SCHEDULE (-0x00000014-L4_SYSCALL_MAGIC_OFFSET)
00020 #define L4_SYSCALL_LTHREAD_EX_REGS (-0x00000018-L4_SYSCALL_MAGIC_OFFSET)
00021 #define L4_SYSCALL_TASK_NEW (-0x0000001C-L4_SYSCALL_MAGIC_OFFSET)
00022
00023 L4_INLINE int l4_nchief(l4_threadid_t destination,
00024 l4_threadid_t *next_chief)
00025 {
00026 register l4_umword_t destid_type asm("r0") = destination.raw;
00027 register l4_threadid_t next asm("r1");
00028
00029 __asm__ __volatile__
00030 (PIC_SAVE_ASM
00031 "stmdb sp!, {fp} \n\t"
00032 "mov lr, pc \n\t"
00033 "mov pc, %2 \n\t"
00034 "ldmia sp!, {fp} \n\t"
00035 PIC_RESTORE_ASM
00036 :
00037 "=r"(destid_type),
00038 "=r"(next)
00039 :
00040 "i"(L4_SYSCALL_ID_NEAREST),
00041 "0"(destid_type)
00042 :
00043 "r2", "r3", "r4", "r5", "r6", "r7",
00044 "r8", "r9", "r12", "r14", "memory" PIC_CLOBBER
00045 );
00046
00047 next_chief->raw = next.raw;
00048
00049 return destid_type;
00050 }
00051
00052 L4_INLINE l4_threadid_t l4_myself()
00053 {
00054 register l4_umword_t nil_id asm("r0") = L4_NIL_ID.raw;
00055 register l4_threadid_t id asm("r1");
00056
00057 __asm__ __volatile__
00058 (PIC_SAVE_ASM
00059 "stmdb sp!, {fp} \n\t"
00060 "mov lr, pc \n\t"
00061 "mov pc, %2 \n\t"
00062 "ldmia sp!, {fp} \n\t"
00063 PIC_RESTORE_ASM
00064 :
00065 "=r"(nil_id),
00066 "=r"(id)
00067 :
00068 "i"(L4_SYSCALL_ID_NEAREST),
00069 "0"(nil_id)
00070 :
00071 "r2", "r3", "r4", "r5", "r6", "r7",
00072 "r8", "r9" PIC_CLOBBER, "r12", "r14", "memory"
00073 );
00074
00075 #ifdef __cplusplus
00076 l4_threadid_t idx;
00077 idx.raw = id.raw;
00078 return idx;
00079 #else
00080 return id;
00081 #endif
00082 }
00083
00084 L4_INLINE void
00085 l4_fpage_unmap(l4_fpage_t fpage, l4_umword_t mask)
00086 {
00087 register l4_umword_t _fpage asm("r0") = fpage.raw;
00088 register l4_umword_t _mask asm("r1") = mask;
00089
00090 __asm__ __volatile__
00091 ("@ l4_fpage_unmap \n\t"
00092 PIC_SAVE_ASM
00093 "stmdb sp!, {fp} \n\t"
00094 "mov lr, pc \n\t"
00095 "mov pc, %2 \n\t"
00096 "ldmia sp!, {fp} \n\t"
00097 PIC_RESTORE_ASM
00098 :
00099 "=r"(_fpage),
00100 "=r"(_mask)
00101 :
00102 "i"(L4_SYSCALL_FPAGE_UNMAP),
00103 "0"(_fpage),
00104 "1"(_mask)
00105 :
00106 "r2", "r3", "r4", "r5", "r6", "r7",
00107 "r8", "r9" PIC_CLOBBER, "r12", "r14"
00108 );
00109 }
00110
00111 L4_INLINE void
00112 l4_thread_switch(l4_threadid_t dest)
00113 {
00114 register l4_umword_t _dest asm("r0") = dest.raw;
00115 __asm__ __volatile__
00116 ("@ l4_thread_switch \n\t"
00117 PIC_SAVE_ASM
00118 "stmdb sp!, {fp} \n\t"
00119 "mov lr, pc \n\t"
00120 "mov pc, %1 \n\t"
00121 "ldmia sp!, {fp} \n\t"
00122 PIC_RESTORE_ASM
00123 :
00124 "=r"(_dest)
00125 :
00126 "i"(L4_SYSCALL_THREAD_SWITCH),
00127 "0"(_dest)
00128 :
00129 "r1", "r2", "r3", "r4", "r5", "r6", "r7",
00130 "r8", "r9" PIC_CLOBBER, "r12", "r14", "memory"
00131 );
00132 }
00133
00134 L4_INLINE void
00135 l4_thread_ex_regs_sc(l4_umword_t val0,
00136 l4_umword_t ip,
00137 l4_umword_t sp,
00138 l4_threadid_t *preempter,
00139 l4_threadid_t *pager,
00140 l4_umword_t *old_cpsr,
00141 l4_umword_t *old_ip,
00142 l4_umword_t *old_sp)
00143 {
00144 register l4_umword_t _dst asm("r0") = val0;
00145 register l4_umword_t _ip asm("r1") = ip;
00146 register l4_umword_t _sp asm("r2") = sp;
00147 register l4_umword_t _pager asm("r3") = pager->raw;
00148 register l4_umword_t _flags asm("r4");
00149 register l4_umword_t _prmpt asm("r5") = preempter->raw;
00150
00151 __asm__ __volatile__
00152 (
00153 PIC_SAVE_ASM
00154 "stmdb sp!, {fp, r12} \n\t"
00155 "mov lr, pc \n\t"
00156 "mov pc, %6 \n\t"
00157 "ldmia sp!, {fp, r12} \n\t"
00158 PIC_RESTORE_ASM
00159 :
00160 "=r" (_dst),
00161 "=r" (_ip),
00162 "=r" (_sp),
00163 "=r" (_pager),
00164 "=r" (_flags),
00165 "=r" (_prmpt)
00166 :
00167 "i" (L4_SYSCALL_LTHREAD_EX_REGS),
00168 "0" (_dst),
00169 "1" (_ip),
00170 "2" (_sp),
00171 "3" (_pager),
00172 "5" (_prmpt)
00173 :
00174 "r6", "r7", "r8", "r9" PIC_CLOBBER, "r14", "memory"
00175 );
00176
00177 if(pager) pager->raw = _pager;
00178 if(preempter) preempter->raw = _prmpt;
00179 if(old_ip) *old_ip = _ip;
00180 if(old_sp) *old_sp = _sp;
00181 if(old_cpsr) *old_cpsr = _flags;
00182 }
00183
00184 L4_INLINE l4_taskid_t
00185 l4_task_new_sc(l4_threadid_t dest,
00186 l4_umword_t mcp_or_new_chief_and_flags,
00187 l4_umword_t usp,
00188 l4_umword_t uip,
00189 l4_threadid_t pager)
00190 {
00191 register l4_umword_t _dest asm("r0") = dest.raw;
00192 register l4_umword_t _mcp asm("r1") = mcp_or_new_chief_and_flags;
00193 register l4_umword_t _pager asm("r2") = pager.raw;
00194 register l4_umword_t _uip asm("r3") = uip;
00195 register l4_umword_t _usp asm("r4") = usp;
00196
00197 __asm__ __volatile__
00198 ("@ l4_task_new() \n\t"
00199 PIC_SAVE_ASM
00200 "stmdb sp!, {fp} \n\t"
00201 "mov lr, pc \n\t"
00202 "mov pc, %[syscall] \n\t"
00203 "ldmia sp!, {fp} \n\t"
00204 PIC_RESTORE_ASM
00205 :
00206 "=r"(_dest),
00207 "=r"(_mcp),
00208 "=r"(_pager),
00209 "=r"(_uip),
00210 "=r"(_usp)
00211 :
00212 [syscall] "i" (L4_SYSCALL_TASK_NEW),
00213 "0"(_dest),
00214 "1"(_mcp),
00215 "2"(_pager),
00216 "3"(_uip),
00217 "4"(_usp)
00218 :
00219 "r5", "r6", "r7", "r8", "r9" PIC_CLOBBER,
00220 "r12", "r14");
00221
00222 return (l4_taskid_t){raw:_dest};
00223 }
00224
00225 L4_INLINE l4_cpu_time_t
00226 l4_thread_schedule(l4_threadid_t dest,
00227 l4_sched_param_t param,
00228 l4_threadid_t *ext_preempter,
00229 l4_threadid_t *partner,
00230 l4_sched_param_t *old_param)
00231 {
00232 register l4_umword_t _param asm("r0") = param.raw;
00233 register l4_umword_t _dest asm("r1") = dest.raw;
00234 register l4_umword_t _preempter asm("r2") = ext_preempter->raw;
00235 register l4_umword_t _t0 asm("r3");
00236 register l4_umword_t _t1 asm("r4");
00237
00238 if (_param != -1UL)
00239 _param &= 0xfff0ffff;
00240
00241 __asm__ __volatile__
00242 ("@ l4_thread_schedule \n\t"
00243 PIC_SAVE_ASM
00244 "stmdb sp!, {fp} \n\t"
00245 "mov lr, pc \n\t"
00246 "mov pc, %5 \n\t"
00247 "ldmia sp!, {fp} \n\t"
00248 PIC_RESTORE_ASM
00249 :
00250 "=r"(_param),
00251 "=r"(_dest),
00252 "=r"(_preempter),
00253 "=r"(_t0),
00254 "=r"(_t1)
00255 :
00256 "i" (L4_SYSCALL_THREAD_SCHEDULE),
00257 "0"(_param),
00258 "1"(_dest),
00259 "2"(_preempter)
00260 :
00261 "r5", "r6", "r7", "r8", "r9" PIC_CLOBBER, "r12", "r14"
00262 );
00263
00264 old_param->raw = _param;
00265 partner->raw = _dest;
00266 ext_preempter->raw = _preempter;
00267
00268 return (l4_cpu_time_t)_t0 | (l4_cpu_time_t)_t1 << 32;
00269 }
00270
00271 L4_INLINE int
00272 l4_privctrl(l4_umword_t cmd,
00273 l4_umword_t param)
00274 {
00275 return -1;
00276 }
00277
00278 #include <l4/sys/syscalls-impl.h>
00279
00280 #endif // __GNUC__
00281
00282 #endif