Hello Adam,
On Tue, May 10, 2011 at 6:26 PM, Adam Lackorzynski adam@os.inf.tu-dresden.de wrote:
- Since ARM machine I use does not provide cache snooping, i.e. I
have to flush/invalidate the caches manually, I've attempted to use the l4_cache_dma_coherent function. It did worked to some degree, but it flushed/invalidated only *some* lines of cache within requested region, instead of *all* lines of cache. Since I've failed to trace the bug, I've extended sigma0 with new functionality - ability to map uncached memory. I still don't like my hack though and I would like to find an official way to either change the attributes (from cached to uncached) of given page, or have fully working l4_cache_dma_coherent.
'io' has the feature to get uncached memory, defining a resource Mmio_ram(size_in_bytes, 1_for_superpages_0_otherwise) in the configuration. That's the official way of getting uncached memory.
The solution you gave is not working, since moe allocated all available RAM already before io even started. Log says:
MOE: Hello world MOE: found 502196 KByte free memory MOE: found RAM from 90000000 to af000000 [...] IO | WARNING: phys mmio resource allocation failed IO | IOMEM [000000903b3000-000000903b3fff 1000] non-pref (32bit) (align=fff flags=c002)
The registry defaults to using the main thread but can be created with other parameters. The extended version is L4Re::Util::Registry_server<> server(L4Re::Env::env()->main_thread(), L4Re::Env::env()->factory());
Thanks for the info, I will check that ASAP!
with best regards, Michal.