i.mx53 and fiasco.oc

22 Aug 2012

      Hello.
I trying to run fiasco.oc + l4re on freescale i.mx53qsb. And have some
problems to do this.

I using i.mx51 platform configuration with some changes. I changed
addresses in src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp:
EXTENSION class Mem_layout
{
public:
  enum Virt_layout_imx53 {
    Timer_map_base       = 0xef1ac000,
    Uart_map_base        = 0xef1bc000,
    Watchdog_map_base    = 0xef198000,
    Pic_map_base         = 0xef200000,
    Uart_base            = Uart_map_base,
  };

  enum Phys_layout_imx53 {
    Device_phys_base_1   = 0x53f00000,
    Device_phys_base_2   = 0x0fffc000,

    Watchdog_phys_base   = 0x53f98000, // wdog1
    Timer_phys_base      = 0x53fac000, // epit1
    Uart_phys_base       = 0x53fbc000, // uart1
    Pic_phys_base        = 0x0fffc000,
  };

};

And made some little changes in other source files.
When I try to boot it, I see something like this:

## Booting kernel from Legacy Image at 70800000 ...
   Image Name:   L4 Image #47
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    897192 Bytes = 876.2 kB
   Load Address: 71000000
   Entry Point:  71000000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

L4 Bootstrapper
  Build: #47 �В�т. �а�в�г. 21 16:49:21 MSK 2012, 4.5.1
  Scanning up to 1024 MB RAM
  Memory size is 512MB (Limited by Scan) (70000000 - 90000000)
  RAM: 0000000070000000 - 000000008fffffff: 524288kB
  Total RAM: 512MB
  mod04: 710c1000-710da540: hello
  mod03: 710a7000-710c0458: l4re
  mod02: 7106d000-710a6624: moe
  mod01: 71063000-7106c370: sigma0
  mod00: 71015000-71062cac: fiasco
  Moving 5 modules to 71100000 with offset eb000
  moving module 05 { 710c1000-710da540 } -> { 711ac000-711c5540 }
  moving module 04 { 710a7000-710c0458 } -> { 71192000-711ab458 }
  moving module 03 { 7106d000-710a6624 } -> { 71158000-71191624 }
  moving module 02 { 71063000-7106c370 } -> { 7114e000-71157370 }
  moving module 01 { 71015000-71062cac } -> { 71100000-7114dcac }
  Scanning fiasco
  Scanning sigma0
  Scanning moe --init=rom/hello
  Relocated mbi to [0x7100f000-0x7100f0d6]
  Loading fiasco
  Loading sigma0
  Loading moe
  find kernel info page...
  found kernel info page at 0x70002000
Regions of list regions
    [ 70001000,  700019bf] {      9c0} Kern   fiasco
    [ 70002000,  7005cfff] {    5b000} Kern   fiasco
    [ 70090000,  7009e17b] {     e17c} Sigma0 sigma0
    [ 70140000,  701717d3] {    317d4} Root   moe
    [ 70178000,  7018eec7] {    16ec8} Root   moe
    [ 71000000,  710143ef] {    143f0} Boot   bootstrap
    [ 7100f000,  7100f1d3] {      1d4} Root   Multiboot info
    [ 71192000,  711c553f] {    33540} Root   Modules Memory
  API Version: (87) experimental
  Sigma0 config    ip:700900e0 sp:71013044
  Roottask config  ip:70140178 sp:00000000
  Starting kernel fiasco at 70001000
Hello from Startup::stage2
Initialize page table

It stops on line 151 src/kern/arm/gic.cpp:
 Io::write<Mword>(0, _dist_base + DIST_CTRL);
where _dist_base is Pic_map_base.
If I understand correctly tzic on i.mx53 and tzic on i.mx51 is equivalent.

And second question: I do not understand for what purpose make pysical
devices and sdram mapping in: src/kern/arm/bootstrap.cpp?
  // map sdram linear from 0xf0000000
  for (va = Mem_layout::Map_base, pa = Mem_layout::Sdram_phys_base;
       va < Mem_layout::Map_base + (4 << 20); va += 0x100000, pa += 0x100000)
    map_1mb(page_dir, va, pa, true, false);

  // map sdram 1:1
  for (va = Mem_layout::Sdram_phys_base;
       va < Mem_layout::Sdram_phys_base + (4 << 20); va += 0x100000)
    map_1mb(page_dir, va, va, true, true);

  map_hw(page_dir);

And why afterwards devises on physical addresses are out of order?

i.mx53 and fiasco.oc

Nikolay Golikov