On Thursday, 29 September 2022 15:36:02 CEST Paul Boddie wrote:
I suppose what I have been clumsily trying to clarify (and dragging you into this) is what the alignment issues are for message parameters. Maybe I should have been reading some kind of ABI documentation, and I can certainly understand that alignment constraints would apply when treating message parameters like normal function call parameters, although that is also in the realm of a platform's ABI documentation.
Following up, trying to make sense of all this, I have largely concluded that I can observe the alignment requirements on AMD64 and MIPS32 in my own IPC mechanisms. For a dataspace map operation, the parameter alignments (in bytes) are as follows:
0: opcode 8: offset 16: hot_spot 24: flags
These apply to both a structure describing the parameters and the way the L4Re RPC framework populates the message registers.
However, on IA32, the structure member alignments appear to be as follows:
0: opcode 4: offset 12: hot_spot 20: flags
At the same time, the RPC framework is generating values that would comply with the expected alignment given above for AMD64 and MIPS32.
So this kind of explains some of my earlier confusion about what should happen on a 32-bit system. In fact, IA32 (x86) seems to be a special case, although I cannot immediately find the documentation that explains why the structure member alignment should be different from the rules applying to other architectures.
I was reminded of Compiler Explorer and did a little experiment:
https://gcc.godbolt.org/z/bzxoceGzs
A structure starting with a 32-bit member and followed by 64-bit members has 64-bit-aligned members on AMD64, as demonstrated above, whereas code generated with the -m32 option exhibits the same properties as that shown above for IA32.
Sorry to confuse things even further!
Paul