Hi,
Adam Lackorzynski wrote:
Hi,
On Thu Jul 03, 2008 at 00:05:42 +0800, Zhang Yinfei wrote:
I've listened to a lecture by Prof. Hermann Haertig about L4 in my university and I'm quite interested in doing some research on L4/Fiasco. I've reviewed some source code of Fiasco recently and one thing I can think of is to add multi-core support for L4/Fiasco. In my investigation, there are some people wrote papers about adding multi-processor (SMP) support for L4 but no one is talking about multi-core support. Is there a big difference between these two in the aspect of fiasco kernel? I'd be very appreciated if you guys can give me some opinions on this. Thanks.
There is basically no difference in the context we're talking about. SMP generally denotes _symmetric_ multi-processing, i.e. processors are part of the same memory coherency domain. Multi-core mostly denote multiple CPUs in one package (e.g. recent dual-core, quad-core offerings). For OSs it's mostly transparent if CPUs are sitting on the same socket in the same package or on e.g. two separate sockets. Those difference are getting bigger when the number of cores increase but that's not commodity yet.
A place for optimization (that the last time I looked was not yet implemented) is awareness of NUMA - Non Uniform Memory Architecture, e.g. with core-local memory in AMD HyperTransport setups.