Hello Adam,

Thank you for your interesting inputs.

I would like now to modify the given example supplied (GitHub - kernkonzept/demo-l4re-micro-hypervisor: L4Re Micro Hypervisor demo for Cortex-R52 and Cortex-R82) that run on Cortex R52, to adapt it to my board and add some "hello world" guests at first.
I did not find a doc/guide to change this example in particular.

I followed the guide https://l4re.org/getting_started/make.html, but I did not manage to cross compile with the tool chain gcc-arm-none-eabi-10.3-2021.10. I hit errors when cross compiling L4re or fiasco for FVP platform with armv8R (see attached log).

What would be your advice to avoid troubles at that stage ? I don't care to use an old version, this is just for feasibility purpose.

Thanks and Regards,

Eric Miniere

From: Adam Lackorzynski
Sent: Saturday, March 22, 2025 12:42 AM
To: Eric Miniere; l4-hackers@os.inf.tu-dresden.de
Cc: Nicola Bruno
Subject: Re: L4re RAM/Flash usage and scheduling timing Info

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Hi,

On Tue Mar 18, 2025 at 10:11:54 +0000, Eric Miniere via l4-hackers wrote:
> I am looking for an estimate of the memory footprint to run the hypervisor L4RE on a quad Core ARM Cortex R52.
> Does it run directly from flash or it needs to be copied to run in RAM ? same question for Guests OS (ie FreeRtos)?

It can also run from flash. A guest as well I believe, but we never
tried I think.

> What could be the minimal needed L4RE footprint for code and data ?

Depends on the config of course. Last time we checked, a config for
16VMs was around 400k. We're constantly trying to improve here.
For the ratio between code/data I do not have numbers at hand but a good
part is code that could/would be running off flash.

> Also if someone could share a rough idea of scheduling time for an ARM R52 running at 400Mhz ? or nb of cycle it takes to schedule ?

On a Cortex-A53 (in-order) we're short over 2000 cycles in the
measurements for a timer interrupt triggered switch, which would
translate to 5µs at 400MHz. If VMs would be involved a little bit more
because of the added state to swtich. I'd assume it would be in similar
range on R52.


Adam