In the first configuration i was using:On Tue May 05, 2015 at 01:28:46 -0400, Reinier Millo S?nchez wrote:Hi AdamFPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl KERNEL: Warning: No page-fault handler for 0xee202214, error 0x94000848, pc f0039420 Somebody have tested Fiasco.OC+L4re on ODROID-X2 or another Exynos 4412 platform?On this platform this seems to be some pattern. However, last time I tried it worked for me. So, hmm, could you try another compiler version and see if it changes behavior? Maybe this gives us some hints.I'm using a linaro toolchain (gcc-linaro-arm-linux-gnueabihf-4.8-2014.03_x86_64). I have tried the arm-none-eabi toolchain in Debian repository but fails compiling the snapshot. I have made some progress trying to run FiascoOC+L4re on Odroid-X2. There are some changes that I have made: I have modified the file "l4/mk/platforms/exynos4.conf" adapting Exynos4's platform to Odroid-X2. In this case the RAM size differs (Odroid-X2 have 2Gb). In this file I have configured the UART for serial output (I'm using UART 1). PLATFORM_RAM_BASE = 0x40000000 - PLATFORM_RAM_SIZE_MB = 1024 + PLATFORM_RAM_SIZE_MB = 2047 + PLATFORM_UART_NR = 1 Booting the generated image I have detected that bootstrap's server is not using UART 1 for output. I have modified the "init" function on "l4/pkg/bootstrap/server/src/platform/exynos.cc" to use the configured UART on the platform file modified above. unsigned long uart_base; - unsigned uart_nr = 2; + unsigned uart_nr = PLATFORM_UART_NR; I have tried to compile and test the image on the Odroid-X2, but fails the execution, this is the serial output: L4 Bootstrapper Build: #18 Sat May 2 15:56:00 CDT 2015, 4.8.3 20140303 (prerelease) Scanning up to 2047 MB RAM, starting at offset 32MB Memory size is 2047MB (40000000 - bfefffff) Limiting 'RAM' region [ 40000000, bfefffff] { 7ff00000} to [ 40000000, bcffffff] { 7d000000} due to 3024 MB address limit RAM: 0000000040000000 - 00000000bcffffff: 2048000kB Total RAM: 2000MB Scanning fiasco Scanning sigma0 Scanning moe Moving up to 5 modules behind 41100000 moving module 02 { 410b4000-410e565f } -> { 411a5000-411d665f } [202336] moving module 01 { 410aa000-410b3377 } -> { 4119b000-411a4377 } [37752] moving module 00 { 41043000-410a9daf } -> { 41134000-4119adaf } [421296] moving module 04 { 41029000-410425b3 } -> { 4111a000-411335b3 } [103860] moving module 03 { 4100f000-41028493 } -> { 41100000-41119493 } [103572] Loading fiasco Loading sigma0 Loading moe find kernel info page... found kernel info page at 0x40002000 Regions of list 'regions' [ 40000000, 400000e3] { e4} Root mbi_rt [ 40001000, 40001aff] { b00} Kern fiasco [ 40002000, 40076fff] { 75000} Kern fiasco [ 40090000, 4009681b] { 681c} Sigma0 sigma0 [ 40098000, 4009e177] { 6178} Sigma0 sigma0 [ 40140000, 4018b4ab] { 4b4ac} Root moe [ 41000000, 4100e4ff] { e500} Boot bootstrap [ 41100000, 41133fff] { 34000} Root Module API Version: (87) experimental Sigma0 config ip:40090100 sp:00000000 Roottask config ip:4014020c sp:00000000 Starting kernel fiasco at 400012c8 Hello from Startup::stage2 Per_cpu_data_alloc: (orig: 0xf0063a50-0xf00644d0) Number of IRQs available at this GIC: 160 FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl KERNEL: Warning: No page-fault handler for 0xee202214, error 0x94000848, pc f0039420 I have been testing and changing the compiling configuration. Using the below configuration to compile Fiasco.OC, the system boots and hangs at "Calibrating timer loop...": Platform Timer -> Multi-core timer Use ExtGic -> True Execution Model -> TrustZone normal side Secure Monitor Interface -> Mobicore Enable multi processor support -> True Maximal supported number of CPUs -> 4Interesting. What's the difference to the previos config?
Platform Timer -> Multi-core timer
Use ExtGic -> True
Execution Model -> Standard mode
Enable multi processor support -> False
We have checked and the system clock at Kip (Kip::k()->clock) is updating on every tick in the function "Timer::update_system_clock", but multiple reads of the clock in the function "Delay::measure" returns the same value.This is the serial output when tested the image on Odroid-X2: Calibrating timer loop... I think that the problem now is with the Exynos4's Timers, but i have been reviewing the implementations and it seems fine. Is there anything wrong on my configuration or somebody have any idea?Does the counter of the timer count, i.e. multiple reads return different values?
Execution Model ->TrustZone Normal sideWe have commented the "Delay:init();" line in the Kernel_thread::bootstrap() in the "src/kernel/fiasco/src/kern/kernel_thread.cpp" file. When test the compiled image on the board, we have the following output with one "Hello World" and then stops in the sleep. We remain thinking that the problem is in the timers implementation.
Secure Monitor Interface ->none
Enable multi processor support ->Disable
U-Boot 2010.12-svn (Dec 21 2012 - 19:44:04) for Exynox4412Somebody have any suggestion?
CPU: S5PC220 [Samsung SOC on SMP Platform Base on ARM CortexA9]
APLL = 1000MHz, MPLL = 880MHz
DRAM: 2047 MiB
PMIC VERSION : 0x00, CHIP REV : 2
TrustZone Enabled BSP
BL1 version: 20121128
Checking Boot Mode ... SDMMC
MMC Device 0: 7695 MB
MMC Device 1 not found
ModeKey Check... run normal_boot
Net: No ethernet found.
Partition1: Start Address(0xc00), Size(0x40400)
reading hello.raw
741376 bytes read
Boot with zImage
Starting kernel ...
L4 Bootstrapper
Build: #32 Fri May 8 15:32:04 EDT 2015, 4.8.3 20140303 (prerelease)
Scanning up to 1023 MB RAM, starting at offset 32MB
Memory size is 1023MB (40000000 - 7fefffff)
RAM: 0000000040000000 - 000000007fefffff: 1047552kB
Total RAM: 1023MB
Scanning fiasco
Scanning sigma0
Scanning moe
Moving up to 5 modules behind 41100000
moving module 02 { 41083000-410b465f } -> { 41174000-411a565f } [202336]
moving module 01 { 41079000-41082377 } -> { 4116a000-41173377 } [37752]
moving module 00 { 41043000-410782bb } -> { 41134000-411692bb } [217788]
moving module 04 { 41029000-410425b3 } -> { 4111a000-411335b3 } [103860]
moving module 03 { 4100f000-41028493 } -> { 41100000-41119493 } [103572]
Loading fiasco
Loading sigma0
Loading moe
find kernel info page...
found kernel info page at 0x40002000
Regions of list 'regions'
[ 40000000, 400000e3] { e4} Root mbi_rt
[ 40001000, 40001aff] { b00} Kern fiasco
[ 40002000, 4003efff] { 3d000} Kern fiasco
[ 40090000, 4009681b] { 681c} Sigma0 sigma0
[ 40098000, 4009e177] { 6178} Sigma0 sigma0
[ 40140000, 4016ef97] { 2ef98} Root moe
[ 40170000, 4018b4ab] { 1b4ac} Root moe
[ 41000000, 4100e4ff] { e500} Boot bootstrap
[ 41100000, 41133fff] { 34000} Root Module
API Version: (87) experimental
Sigma0 config ip:40090100 sp:00000000
Roottask config ip:4014020c sp:00000000
Starting kernel fiasco at 400012c8
Hello from Startup::stage2
Number of IRQs available at this GIC: 160
FPU0: Arch: VFPv3(3), Part: VFPv3(30), r: 4, v: 9, i: 41, t: hard, p: dbl/sngl
Watchdog initialized
SERIAL ESC: allocated IRQ 85 for serial uart
Not using serial hack in slow timer handler.
\0x1b[1;32mWelcome to Fiasco.OC (arm)!
\0x1b[0;32mL4/Fiasco.OC arm microkernel (C) 1998-2013 TU Dresden
Rev: unknown compiled with gcc 4.8.3 for Samsung Exynos []
Build: #109 Fri May 8 15:25:47 EDT 2015
\0x1b[0m
Timer for CPU0 is at IRQ 28
Calibrating timer loop... done.
MDB: use page size: 20
MDB: use page size: 12
SIGMA0: Hello!
KIP @ 40002000
allocated 4KB for maintenance structures
SIGMA0: Dump of all resource maps
RAM:------------------------
[4:40000000;40000fff]
[0:4003f000;4008ffff]
[0:40097000;40097fff]
[0:4009f000;4013ffff]
[4:40140000;4016efff]
[0:4016f000;4016ffff]
[4:40170000;4018bfff]
[0:4018c000;410fffff]
[4:41100000;41133fff]
[0:41134000;7eefffff]
IOMEM:----------------------
[0:0;3fffffff]
[0:7ff00000;ffffffff]
MOE: Hello world
MOE: found 1030352 KByte free memory
MOE: found RAM from 40000000 to 7ef00000
MOE: allocated 1007 KByte for the page array @0x4018c000
MOE: virtual user address space [0-bfffffff]
MOE: rom name space cap -> [C:501000]
BOOTFS: [41100000-41119494] [C:503000] l4re
BOOTFS: [4111a000-411335b4] [C:504000] hello
MOE: cmdline: moe --init=rom/hello
MOE: Starting: rom/hello
MOE: loading 'rom/hello'
Hello World!
-- Lic. Reinier Millo Sánchez Centro de Estudios de Informática Universidad Central "Marta Abreu" de Las Villas Carretera a Camajuaní Km 5 1/2 Santa Clara, Villa Clara, Cuba CP 54830 "antes de discutir ... respira; antes de hablar ... escucha; antes de escribir ... piensa; antes de herir ... siente; antes de rendirte ... intenta; antes de morir ... vive"