I have almost identical code except I'm running on a mips based platform with a 16550 UART so I don't use the shift parameter. I do the regs->writes() but when I peek at the physical memory with GDB I don't see the values I wrote. The l4io_request_iomem() is called with   L4IO_MEM_NONCACHED (and there is no enabled cache in my setup) and it doesn't return an error. I doesn't look like the values are getting written to the mmio block.

On Mon, May 4, 2015 at 4:05 AM, Pflaum, Clemens <clemens.pflaum@mytum.de> wrote:
Hi,

How does the 'no access' show? J12 is described as having UART7 so I'd
assume the UART is there. (UART4 starts on a new page, you have mapped
that too?)
If I try to read any register like I usally do:
      char sc = regs->read<unsigned char>(LCR);
      printf("0x0C LCR: %#010x\n", sc);
All i get is 0x00 even if i try writing to it before. I have had the
exact same problem with UART0-3 before manually adjusting the
Registers to their actual offsets or setting the shift parameter of
Io_register_block_mmio to 2. So its actually like I'm looking
at/writing to the wrong places.
I map the memory similar to the serial-drv example only ever one UART at a time:
   #define IRQ_NUM 52                 //currently set to UART7, 36 for UART3
   #define UART_BASE 0x01C29C00       //currently set to UART7, 0x01C28C00 for UART3

bool Maestro_server::init()
   {
      printf("init start\n");
      l4_addr_t virt_base = 0;

      if (l4io_request_iomem((l4_addr_t)UART_BASE, 0x0400, L4IO_MEM_NONCACHED, &virt_base))
        {
          printf("maestro-drv: request io-memory from l4io failed.\n");
          return false;
        }
      printf("maestro-drv: virtual base at:%lx\n", virt_base);


      L4::Io_register_block_mmio *regs = new L4::Io_register_block_mmio(virt_base, 2);
      printf("registered regs\n");

      _uart = new (malloc(sizeof(L4::Uart_bpi16550))) L4::Uart_bpi16550((unsigned long) 115200);
      printf("malloc for _uart\n");
      printf("\n");

      if(!(_uart->startup(regs))){
             printf("failed to startup uart regs!\n");
      }
      .
      .
}

Together with the folling in my .devs file

local Hw = Io.Hw
local Res = Io.Res
Io.hw_add_devices
{
   UART7 = Hw.Device
   {
      hid = "UART7";
      Res.irq(52);
      Res.mmio(0x01C29C00, 0x01C29FFF);

   }
}

Hmm, does it work with on Linux, i.e. it's not something
hardware-related?

I have tested the UARTS with the Bananian linux and they work just
fine, so it cant be hardware-related.

Regards,
Clemens


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