Hi Adam,
Other issue could be a missing CONFIG_AEABI.
Thanks for your reply and your time. Nonetheless the CONFIG_AEABI is enabled in L4linux:
# # Kernel Features # [...] CONFIG_AEABI=y CONFIG_OABI_COMPAT=y [...]
But I suppose you tried that already?
I have already tried the configuration file this way with the same result (I can reach the end of the boot but I have no input and I can enter into the jdb in Qemu).
Thanks in advance for your help,
Nicolas
-----Message d'origine----- De : l4-hackers [mailto:l4-hackers-bounces@os.inf.tu-dresden.de] De la part de Adam Lackorzynski Envoyé : mardi 17 mars 2015 23:11 À : l4-hackers@os.inf.tu-dresden.de Objet : Re: ARM with Qemu
Hi Nicolas,
On Mon Mar 16, 2015 at 10:41:21 +0100, Nicolas VARONA wrote:
FPU support also needs to be enabled in Fiasco. I suppose it is?
I had already enabled FPU in Fiasco like this:
Ok, good.
I checked the CPACR register and the bits look ok. VFP is also enabled on the board. So you are right, it seems to be something else.
Other issue could be a missing CONFIG_AEABI.
Which ramdisk are you using?
I use the ramdisk given in the files in the l4re-snapshot-2014092821: "ramdisk-arm.rd"
ok.
Do you have the 'log = L4.Env.log' statement in the script for launching L4Linux? Do not start anything else which uses 'log = L4.Env.log'.
I firstly tested adding this log without commenting the others. I don't have inputs on L4linux with Qemu. So I tried with only the 'log = L4.Env.log'. I have the same result with no input and I still can enter into the JDB. This is the "l4lx.cfg" file I used: -- vim:set ft=lua:
local lxname = "vmlinuz"; if L4.Info.arch() == "arm" then lxname = "vmlinuz.arm"; end
You need to have it like this:
L4.default_loader:start( { caps = { log = L4.Env.log:m("rws"), }, }, "rom/" .. lxname .. " mem=64M console=ttyLv0 l4x_rd=rom/ramdisk-" .. L4.Info.arch() .. ".rd root=1:0 ramdisk_size=4000");
But I suppose you tried that already?
What is Linux telling us about ttyLv0?
During the boot with the configuration file I gave you, I can see: [...] ttyLv0 at MMIO 0x1 (irq = 211, base_baud = 230400) is a L4 [...]
That looks fine.
Adam