Dear all,
I'm working on porting Fiasco to an ARM(922T) platform. Currently, I can get into kernel debugger, and successfully leave the `Calibrating timer loop'. But then I stuck in Thread::init_workload, fail to create sigma0_thread. ARM processor would raise a data abort exception and then goto 0xffff0010.
It seems failed because trying to load an illegal virtual address at 0xc0080004, which doing this at :
Kernel_thread::init_workload Thread::create Thread::maybe_create Thread::thread_lock Thread_lock::lock_dirty ... Switch_lock<Thread_lock_valid>::lock
I guess the problem maybe becuase some architecture porting part still has problem, or because the sigma0_task create for sigma0_thread setting wrong memory space, because I've some memory space setting incorrect. Honestly, I don't know where setting the virtual address translation for 0xd0000000 ~ 0xc0000000(_tcbs_1 to phys_offset), is this range use for each thread's tcb ?
And where can I get more information about Fiasco's memory layout? for example, what does Mem_layout::Tcbs and Mem_layout::User_max means? which range of memory is used for specific purpose, for example, I/O device(seems is 0xef100000 ~ ) ?
Any advice is appreciate. Thanks.
Best Regards, Tsai, Tung-Chieh