22 Jun
2007
22 Jun
'07
9:37 a.m.
Alexander Warg wrote:
In particular, the Fiasco IPC path for register only IPC runs with disabled interrupts and has explicit preemption points.
Then everything else in Fiasco runs with interrupts enabled and it is preemptable. Is this correct ? Are there notable exceptions ?
The work of Rene Reusner (unfortunately in German) describes the trade-off between preemptability and performance of the IPC path. http://os.inf.tu-dresden.de/papers_ps/reusner-diplom.pdf
Very interesting. It would be good to have an English translation of this thesis, or a paper based on it.
Thanks a lot for the prompt and informative answer,
Sergio
--
Sergio Ruocco, PhD Research Fellow
ruocco@disco.unimib.it / sergio.ruocco@gmail.com NOMADIS Lab.
phone: +39-02-6448-7879 mobile, embedded real-time systems
skype: 'sergioruocco' Università degli Studi di Milano-Bicocca, Italy