Hi, I'm trying to run Fiasco.OC amd64 build on an Opteron 6100 magny-cours series (4-way-SMP, 12-cores-per-chip). When it boots it is as if the scheduling interrupt on the local APIC is not getting set up correctly. It also warns about some errata. It does boot with MP disabled, and RTC for the scheduling - not much use on a 48-core machine though ;-)
Any clues??? Thanks, Daniel
--- Per_cpu_data_alloc: (orig: 0xfffffffff0080840-0xfffffffff0081498) Allocate 3160 bytes (3KB) for CPU[43] local storage (offset=fc887c0) OSVW_MSR1 = 0x000000000000000c #Errata known 4, affected by at least one Allocate cpu_mem @ 0xffffffffffd0b000 Local APIC[19]: version=10 max_lvt=5 APIC ESR value before/after enabling: 00000000/00000000 Using the Local APIC timer on vector 90 (Periodic Mode) for scheduling CPU[43:25]: AuthenticAMD (10:9:1:0)[00100f91] Model: Unknown CPU at 2200 MHz
32/512 Entry I TLB (4K pages) 16 Entry I TLB (4M pages) 48/512 Entry D TLB (4K pages) 48/128 Entry D TLB (4M pages) 64 KB L1 I Cache (2-way associative, 64 bytes per line) 64 KB L1 D Cache (2-way associative, 64 bytes per line) 512 KB L2 U Cache (8-way associative, 64 bytes per line) 10240 KB L3 U Cache (13-way associative, 64 bytes per line)
CPU[43]: goes to idle loop
Hi,
On Fri Mar 11, 2011 at 15:46:57 -0800, Daniel Waddington wrote:
I'm trying to run Fiasco.OC amd64 build on an Opteron 6100 magny-cours series (4-way-SMP, 12-cores-per-chip). When it boots it is as if the scheduling interrupt on the local APIC is not getting set up correctly. It also warns about some errata. It does boot with MP disabled, and RTC for the scheduling - not much use on a 48-core machine though ;-)
Thanks for testing this. Could you send me the complete boot-up output (via PM) so I could have a look? Could you also try limit the number of CPUs to 2 and 12 in the config to see if that changes something in the behaviour?
Thanks, Adam
On Fri, 2011-03-11 at 15:46 -0800, Daniel Waddington wrote:
Hi, I'm trying to run Fiasco.OC amd64 build on an Opteron 6100 magny-cours series (4-way-SMP, 12-cores-per-chip). When it boots it is as if the scheduling interrupt on the local APIC is not getting set up correctly. It also warns about some errata. It does boot with MP disabled, and RTC for the scheduling - not much use on a 48-core machine though ;-)
Hi, after some investigation it seems to be a problem in our ACPI code, so you could try the attached patch for the fiasco kernel. If it does not work, it should at least give some more verbose output at boot, something like:
ACPI: RSDP[0xfbed0] r02 OEM:ACPIAM ACPI: XSDT[0x20090100] r01 OEM:080610 OEMTID:XSDT2014 ACPI: RSDT[0x20090000] r01 OEM:080610 OEMTID:RSDT2014 ACPI: FACP[0x20090290] r03 OEM:080610 OEMTID:FACP2014 ACPI: APIC[0x20090390] r01 OEM:080610 OEMTID:APIC2014 ACPI: MCFG[0x20090420] r01 OEM:080610 OEMTID:OEMMCFG. ACPI: OEMB[0x200a8040] r01 OEM:080610 OEMTID:OEMB2014 ACPI: SRAT[0x2009f8b0] r01 OEM:AMD... OEMTID:FAM.F.10 ACPI: HPET[0x2009f9c0] r01 OEM:080610 OEMTID:OEMHPET. ACPI: IVRS[0x2009fa00] r01 OEM:AMD... OEMTID:RD890S.. ACPI: SSDT[0x2009fae0] r01 OEM:A.M.I. OEMTID:POWERNOW
regards
l4-hackers@os.inf.tu-dresden.de