I have been reading several papers about micro kernel and they explain how critical the IPC design is for kernel performance, most of them point to use of register, incomplete context switch and so on.
Here is my question: Is not possible to use the MMU and just execute a page swap between address spaces ? Make changes in the page table is not something fast ?
On Tue Jun 24, 2014 at 08:16:19 -0500, Jorge Ventura wrote:
I have been reading several papers about micro kernel and they explain how critical the IPC design is for kernel performance, most of them point to use of register, incomplete context switch and so on.
Here is my question: Is not possible to use the MMU and just execute a page swap between address spaces ? Make changes in the page table is not something fast ?
I'm not sure I fully understand the idea. Manipulating page tables usually also means TLB flushing which is usually something to avoid. However, why swap? Just have the page in both address spaces and call it shared memory. Easy way for high bandwidth data exchange between address spaces. Notification would still be some kind of IPC (e.g. IRQ) but without any payload.
Adam
l4-hackers@os.inf.tu-dresden.de