Hi all， I have read the wikipedia website of L4 kernel(http://en.wikipedia.org/wiki/L4_microkernel_family), it says that  L4/Fiasco was designed "fully preemptible to achieve a low interrupt latency " at first, however "the complexities of a fully preemptible design resulted in later versions of Fiasco to return to the traditional L4 approach of running the kernel with interrupts disabled ". I am very interested in the kernel's interrupt latency. I have check the latest versions of Fiasco kernel in running, and it keeps interrupts disabled indeed. So I wonder whether there was any early version of L4/Fiasco which supported fully preemptible? Or was there any article talked about this ? Thanks！