L4 threadid ver0 and ver1 bits

[Michael Hohmuth]

"Adam 'WeirdArms' Wiggins" <awiggins at cse.unsw.edu.au> writes:

> 	I think they were seperate in the Intel for efficiency reasons,

Yes, that's right: The way the bits are laid out in thread ids, it
takes the kernel only one AND and one OR to compute the address of the
thread control block; no shifts or lookups necessary.  (Fiasco
actually currently adds a shift because the kernel stack contained in
the thread control blocks is larger to accommodate for the fact that
higher-level languages need more stack space.)

Michael
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