L4-Linux worked on 486!

edmundo at rano.demon.co.uk edmundo at rano.demon.co.uk
Wed Aug 4 12:55:54 CEST 1999


Jochen Liedtke asked, and I think it's a crucial question:

> are the interrupts constantly disabled from raising the interrupt until executing that code?

Looking at the code, I think the answer is yes. (There is, however,
quite a lot of code between the interrupt happening and the
non-specific EOI being issued, and there are lots of macros and
conditional compilations, so I might be wrong. Is it possible to
inspect the state of the interrupt-disable flag using remote gdb?)

In which case I no longer understand what Jean Wolter wrote about
priority assignment to interrupt threads. If interrupts are constantly
disabled from raising the interrupt until the non-specific EOI, how
can the priorities matter? If the PIC can "deliver" an interrupt with
higher priority while interrupts are disabled, and if the non-specific
EOI then acknowledges the highest-priority interrupt that was
delivered, as opposed to the hightest-priority interrupt that is being
serviced, then we are always in trouble if we issue a non-specific EOI
with interupts disabled. In this case, should we reenable interrupts
before doing the EOI?

But I can't think why the PIC should have been designed this way.

Also Jochen Liedtke suggests the problem might be "caused" by
interrupts not being disabled all the way until the EOI:

> 	(Unspecific eoi (0x20) always clears the highest irq. If an interrupt can happen between raising the original interrupt and executing the unspecific eoi, this might clear a higher irq instead of the currently handled irq. Consequences: arbitrary confusion: the higher irq is cleared too early, the next unspecific eoi clears a lower irq, ...) 

To reconcile this, I am lead to conclude that my inspection of the
code is mistaken, interrupts are not disabled constantly from raising
the interrupt until issuing the EOI, and this is deliberately so, but
somehow we are ending up in the wrong interrupt thread after a
higher-priority interrupts interrupts a lower-priority one.

I'm really out of my depth here. Can anyone recommend a good book, or
other source of information, about x86 and PIC programming? (I don't
need an introduction to assembler programming, as I did a lot of 6502
and 8080 as a child, but I don't know much about x86 specifics or
about interrupt details.)

Edmund



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