Question about cross core IPC

[Yuxin Ren]

Hi

I am learning the IPC code in the Fiasco kernel. I have some questions here.

If the receiver is not ready, we will add the sender to the sender_list.
But I did find any lock to protect the sender_list. So if two threads at
different cores try to add themselves to the sender_list at the same time,
how can we guarantee the we are safe to do so?

When sender and receiver are at different cores, we have to use IPI to
communicate. Where is the code on IPC path to use IPI? I imagine the code
around IPI should be complex, so it is great if someone can tell me the
logic about it, especially about how we protect data structures, using
locks or any other lock-free algorithm.

Thank you very much.
Best
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