Testing Fiasco.OC+L4re on ODROID-X2(Exynos4412)
Reinier Millo Sánchez
rmillo at uclv.cu
Wed May 27 00:53:13 CEST 2015
Hi Adam
I have some questions. Some months ago we have tested succesfully
Fiasco.OC+L4Re on Exynos5250. Now we're having some troubles to test it
on Exynos4412.
Reviewing the interrupts mechanism, I have noted that the GIC is
implemented on Fiasco.OC at the ARM architecture level. Fiasco.OC it's
working fine on Exynos5250, but the Exynos5250's GIC is based on the
"ARM Generic Interrupt Controller-Architecture Specification,
Architecture version 2.0". Looking on the Cortex-A9 MPCore TRM, I have
found that the Cortex-A9's GIC is based on the "ARM Generic Interrupt
Controller-Architecture Specification, Architecture version 1.0".
What version of the GIC's specification was used to implement GIC's
class in Fiasco.OC?
In case that version 2.0 is being used, this can affect the interrupts
on Exynos4412?
Best regards
--
Lic. Reinier Millo Sánchez
Centro de Estudios de Informática
Universidad Central "Marta Abreu" de Las Villas
Carretera a Camajuaní Km 5 1/2
Santa Clara, Villa Clara, Cuba
CP 54830
"antes de discutir ... respira;
antes de hablar ... escucha;
antes de escribir ... piensa;
antes de herir ... siente;
antes de rendirte ... intenta;
antes de morir ... vive"
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