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<div class="headertitle"><div class="title">L4vbus PCI functions <div class="ingroups"><a class="el" href="group__l4vbus__module.html">L4 Vbus functions</a></div></div></div>
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<div id="dynsection-0" onclick="return dynsection.toggleVisibility(this)" class="dynheader closed" style="cursor:pointer;"><span class="dynarrow"><span class="arrowhead closed"></span></span>Collaboration diagram for L4vbus PCI functions:</div>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 id="header-func-members" class="groupheader"><a id="func-members" name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:ga25822b176d2142cac40239f3db9ed7f0" id="r_ga25822b176d2142cac40239f3db9ed7f0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__l4sys__defines.html#ga5f022ce5422df9cc6ed415e2bfc90f59">L4_BEGIN_DECLS</a> int </td><td class="memItemRight" valign="bottom"><a class="el" href="#ga25822b176d2142cac40239f3db9ed7f0">l4vbus_pci_cfg_read</a> (<a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a> vbus, <a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a> handle, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> bus, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> devfn, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> *value, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)</td></tr>
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<tr class="memdesc:ga25822b176d2142cac40239f3db9ed7f0"><td class="mdescLeft"> </td><td class="mdescRight">Read from the vPCI configuration space using the PCI root bridge. <br /></td></tr>
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<tr class="memitem:ga5d4daafe0f275a28a5ba1941cfdfa837" id="r_ga5d4daafe0f275a28a5ba1941cfdfa837"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="#ga5d4daafe0f275a28a5ba1941cfdfa837">l4vbus_pci_cfg_write</a> (<a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a> vbus, <a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a> handle, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> bus, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> devfn, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> value, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)</td></tr>
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<tr class="memdesc:ga5d4daafe0f275a28a5ba1941cfdfa837"><td class="mdescLeft"> </td><td class="mdescRight">Write to the vPCI configuration space using the PCI root bridge. <br /></td></tr>
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<tr class="memitem:gad35bdd82e72df73ba00badf6cfe7cf6c" id="r_gad35bdd82e72df73ba00badf6cfe7cf6c"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="#gad35bdd82e72df73ba00badf6cfe7cf6c">l4vbus_pci_irq_enable</a> (<a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a> vbus, <a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a> handle, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> bus, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> devfn, int pin, unsigned char *trigger, unsigned char *polarity)</td></tr>
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<tr class="memdesc:gad35bdd82e72df73ba00badf6cfe7cf6c"><td class="mdescLeft"> </td><td class="mdescRight">Enable PCI interrupt for a specific device using the PCI root bridge. <br /></td></tr>
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<tr class="memitem:gaf6db088ef60ca6f09dbfb50a4b34ae32" id="r_gaf6db088ef60ca6f09dbfb50a4b34ae32"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="#gaf6db088ef60ca6f09dbfb50a4b34ae32">l4vbus_pcidev_cfg_read</a> (<a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a> vbus, <a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a> handle, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> *value, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)</td></tr>
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<tr class="memdesc:gaf6db088ef60ca6f09dbfb50a4b34ae32"><td class="mdescLeft"> </td><td class="mdescRight">Read from the device's vPCI configuration space. <br /></td></tr>
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<tr class="memitem:gaed48c2e41fa4fc7cefeaca2b15b34aa5" id="r_gaed48c2e41fa4fc7cefeaca2b15b34aa5"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="#gaed48c2e41fa4fc7cefeaca2b15b34aa5">l4vbus_pcidev_cfg_write</a> (<a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a> vbus, <a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a> handle, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> value, <a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)</td></tr>
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<tr class="memdesc:gaed48c2e41fa4fc7cefeaca2b15b34aa5"><td class="mdescLeft"> </td><td class="mdescRight">Write to the device's vPCI configuration space. <br /></td></tr>
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<tr class="memitem:ga71117c2627ed84dc404d6fc4582b9ec5" id="r_ga71117c2627ed84dc404d6fc4582b9ec5"><td class="memItemLeft" align="right" valign="top">int </td><td class="memItemRight" valign="bottom"><a class="el" href="#ga71117c2627ed84dc404d6fc4582b9ec5">l4vbus_pcidev_irq_enable</a> (<a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a> vbus, <a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a> handle, unsigned char *trigger, unsigned char *polarity)</td></tr>
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<tr class="memdesc:ga71117c2627ed84dc404d6fc4582b9ec5"><td class="mdescLeft"> </td><td class="mdescRight">Enable the device's PCI interrupt. <br /></td></tr>
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</table>
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<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
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<a name="doc-func-members" id="doc-func-members"></a><h2 id="header-doc-func-members" class="groupheader">Function Documentation</h2>
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<a id="ga25822b176d2142cac40239f3db9ed7f0" name="ga25822b176d2142cac40239f3db9ed7f0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga25822b176d2142cac40239f3db9ed7f0">◆ </a></span>l4vbus_pci_cfg_read()</h2>
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<td class="memname"><a class="el" href="group__l4sys__defines.html#ga5f022ce5422df9cc6ed415e2bfc90f59">L4_BEGIN_DECLS</a> int l4vbus_pci_cfg_read </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a></td> <td class="paramname"><span class="paramname"><em>vbus</em></span>, </td>
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<td class="paramtype"><a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a></td> <td class="paramname"><span class="paramname"><em>handle</em></span>, </td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>bus</em></span>, </td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>devfn</em></span>, </td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>reg</em></span>, </td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> *</td> <td class="paramname"><span class="paramname"><em>value</em></span>, </td>
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<td class="paramkey"></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>width</em></span> )</td>
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<p>Read from the vPCI configuration space using the PCI root bridge. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir"></td><td class="paramname">vbus</td><td>Capability of the system bus </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">handle</td><td>Device handle of the PCI root bridge </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">bus</td><td>Bus number </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">devfn</td><td>Device id (upper 16bit) and function (lower 16bit) </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">reg</td><td>Register in configuration space to read </td></tr>
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<tr><td class="paramdir">[out]</td><td class="paramname">value</td><td>Value that has been read </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">width</td><td>Width to read in bits (e.g. 8, 16, 32)</td></tr>
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</table>
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</dd>
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<dl class="section return"><dt>Returns</dt><dd>0 on success, else failure </dd></dl>
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<p class="reference">References <a class="el" href="arm_2l4_2sys_2linkage_8h_source.html#l00033">L4_CV</a>.</p>
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<p class="reference">Referenced by <a class="el" href="vbus__pci_source.html#l00039">L4vbus::Pci_host_bridge::cfg_read()</a>.</p>
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<div id="dynsection-1" onclick="return dynsection.toggleVisibility(this)" class="dynheader closed" style="cursor:pointer;"><span class="dynarrow"><span class="arrowhead closed"></span></span>Here is the caller graph for this function:</div>
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</div>
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<div id="dynsection-1-content" class="dyncontent" style="display:none;">
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<div class="center"><iframe scrolling="no" loading="lazy" frameborder="0" src="group__l4vbus__pci__module_ga25822b176d2142cac40239f3db9ed7f0_icgraph.svg" width="392" height="51"><p><b>This browser is not able to show SVG: try Firefox, Chrome, Safari, or Opera instead.</b></p></iframe></div>
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<a id="ga5d4daafe0f275a28a5ba1941cfdfa837" name="ga5d4daafe0f275a28a5ba1941cfdfa837"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga5d4daafe0f275a28a5ba1941cfdfa837">◆ </a></span>l4vbus_pci_cfg_write()</h2>
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<td class="memname">int l4vbus_pci_cfg_write </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a></td> <td class="paramname"><span class="paramname"><em>vbus</em></span>, </td>
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<td class="paramtype"><a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a></td> <td class="paramname"><span class="paramname"><em>handle</em></span>, </td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>bus</em></span>, </td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>devfn</em></span>, </td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>reg</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>value</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>width</em></span> )</td>
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</div><div class="memdoc">
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<p>Write to the vPCI configuration space using the PCI root bridge. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">vbus</td><td>Capability of the system bus </td></tr>
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<tr><td class="paramname">handle</td><td>Device handle of the PCI root bridge </td></tr>
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<tr><td class="paramname">bus</td><td>Bus number </td></tr>
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<tr><td class="paramname">devfn</td><td>Device id (upper 16bit) and function (lower 16bit) </td></tr>
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<tr><td class="paramname">reg</td><td>Register in configuration space to write </td></tr>
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<tr><td class="paramname">value</td><td>Value to write </td></tr>
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<tr><td class="paramname">width</td><td>Width to write in bits (e.g. 8, 16, 32)</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>0 on success, else failure </dd></dl>
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<p class="reference">References <a class="el" href="arm_2l4_2sys_2linkage_8h_source.html#l00033">L4_CV</a>.</p>
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<p class="reference">Referenced by <a class="el" href="vbus__pci_source.html#l00058">L4vbus::Pci_host_bridge::cfg_write()</a>.</p>
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<div class="center"><iframe scrolling="no" loading="lazy" frameborder="0" src="group__l4vbus__pci__module_ga5d4daafe0f275a28a5ba1941cfdfa837_icgraph.svg" width="396" height="51"><p><b>This browser is not able to show SVG: try Firefox, Chrome, Safari, or Opera instead.</b></p></iframe></div>
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<a id="gad35bdd82e72df73ba00badf6cfe7cf6c" name="gad35bdd82e72df73ba00badf6cfe7cf6c"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gad35bdd82e72df73ba00badf6cfe7cf6c">◆ </a></span>l4vbus_pci_irq_enable()</h2>
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<td class="memname">int l4vbus_pci_irq_enable </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a></td> <td class="paramname"><span class="paramname"><em>vbus</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a></td> <td class="paramname"><span class="paramname"><em>handle</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>bus</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>devfn</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">int</td> <td class="paramname"><span class="paramname"><em>pin</em></span>, </td>
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</tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">unsigned char *</td> <td class="paramname"><span class="paramname"><em>trigger</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">unsigned char *</td> <td class="paramname"><span class="paramname"><em>polarity</em></span> )</td>
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</div><div class="memdoc">
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<p>Enable PCI interrupt for a specific device using the PCI root bridge. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir"></td><td class="paramname">vbus</td><td>Capability of the system bus </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">handle</td><td>Device handle of the PCI root bridge </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">bus</td><td>Bus number </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">devfn</td><td>Device id (upper 16bit) and function (lower 16bit) </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">pin</td><td>Interrupt pin (normally as reported in configuration register INTR) </td></tr>
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<tr><td class="paramdir">[out]</td><td class="paramname">trigger</td><td>False if interrupt is level-triggered </td></tr>
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<tr><td class="paramdir">[out]</td><td class="paramname">polarity</td><td>True if interrupt is of low polarity</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>On success: Interrupt line to be used, else failure </dd></dl>
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<p class="reference">References <a class="el" href="arm_2l4_2sys_2linkage_8h_source.html#l00033">L4_CV</a>.</p>
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<p class="reference">Referenced by <a class="el" href="vbus__pci_source.html#l00079">L4vbus::Pci_host_bridge::irq_enable()</a>.</p>
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<div class="center"><iframe scrolling="no" loading="lazy" frameborder="0" src="group__l4vbus__pci__module_gad35bdd82e72df73ba00badf6cfe7cf6c_icgraph.svg" width="404" height="51"><p><b>This browser is not able to show SVG: try Firefox, Chrome, Safari, or Opera instead.</b></p></iframe></div>
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</div>
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</div>
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</div>
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<a id="gaf6db088ef60ca6f09dbfb50a4b34ae32" name="gaf6db088ef60ca6f09dbfb50a4b34ae32"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaf6db088ef60ca6f09dbfb50a4b34ae32">◆ </a></span>l4vbus_pcidev_cfg_read()</h2>
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<div class="memitem">
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<td class="memname">int l4vbus_pcidev_cfg_read </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a></td> <td class="paramname"><span class="paramname"><em>vbus</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a></td> <td class="paramname"><span class="paramname"><em>handle</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>reg</em></span>, </td>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> *</td> <td class="paramname"><span class="paramname"><em>value</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>width</em></span> )</td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Read from the device's vPCI configuration space. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir"></td><td class="paramname">vbus</td><td>Capability of the system bus </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">handle</td><td>Device handle of the PCI device </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">reg</td><td>Register in configuration space to read </td></tr>
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<tr><td class="paramdir">[out]</td><td class="paramname">value</td><td>Value that has been read </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">width</td><td>Width to read in bits (e.g. 8, 16, 32)</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>0 on success, else failure </dd></dl>
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<p class="reference">References <a class="el" href="arm_2l4_2sys_2linkage_8h_source.html#l00033">L4_CV</a>.</p>
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<p class="reference">Referenced by <a class="el" href="vbus__pci_source.html#l00105">L4vbus::Pci_dev::cfg_read()</a>.</p>
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<div class="center"><iframe scrolling="no" loading="lazy" frameborder="0" src="group__l4vbus__pci__module_gaf6db088ef60ca6f09dbfb50a4b34ae32_icgraph.svg" width="427" height="36"><p><b>This browser is not able to show SVG: try Firefox, Chrome, Safari, or Opera instead.</b></p></iframe></div>
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</div>
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</div>
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</div>
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<a id="gaed48c2e41fa4fc7cefeaca2b15b34aa5" name="gaed48c2e41fa4fc7cefeaca2b15b34aa5"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaed48c2e41fa4fc7cefeaca2b15b34aa5">◆ </a></span>l4vbus_pcidev_cfg_write()</h2>
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<div class="memitem">
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<td class="memname">int l4vbus_pcidev_cfg_write </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a></td> <td class="paramname"><span class="paramname"><em>vbus</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a></td> <td class="paramname"><span class="paramname"><em>handle</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>reg</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>value</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></td> <td class="paramname"><span class="paramname"><em>width</em></span> )</td>
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</div><div class="memdoc">
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<p>Write to the device's vPCI configuration space. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">vbus</td><td>Capability of the system bus </td></tr>
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<tr><td class="paramname">handle</td><td>Device handle of the PCI device </td></tr>
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<tr><td class="paramname">reg</td><td>Register in configuration space to write </td></tr>
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<tr><td class="paramname">value</td><td>Value to write </td></tr>
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<tr><td class="paramname">width</td><td>Width to write in bits (e.g. 8, 16, 32)</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>0 on success, else failure </dd></dl>
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<p class="reference">References <a class="el" href="arm_2l4_2sys_2linkage_8h_source.html#l00033">L4_CV</a>.</p>
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<p class="reference">Referenced by <a class="el" href="vbus__pci_source.html#l00121">L4vbus::Pci_dev::cfg_write()</a>.</p>
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<div class="center"><iframe scrolling="no" loading="lazy" frameborder="0" src="group__l4vbus__pci__module_gaed48c2e41fa4fc7cefeaca2b15b34aa5_icgraph.svg" width="395" height="51"><p><b>This browser is not able to show SVG: try Firefox, Chrome, Safari, or Opera instead.</b></p></iframe></div>
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<a id="ga71117c2627ed84dc404d6fc4582b9ec5" name="ga71117c2627ed84dc404d6fc4582b9ec5"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga71117c2627ed84dc404d6fc4582b9ec5">◆ </a></span>l4vbus_pcidev_irq_enable()</h2>
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<div class="memitem">
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<div class="memproto">
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<td class="memname">int l4vbus_pcidev_irq_enable </td>
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<td>(</td>
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<td class="paramtype"><a class="el" href="group__l4__cap__api.html#ga1445e923ce73029130d569d6e69a4dd8">l4_cap_idx_t</a></td> <td class="paramname"><span class="paramname"><em>vbus</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype"><a class="el" href="vbus__types_8h.html#a3d2ee122c9c592d768eee886d36b31cf">l4vbus_device_handle_t</a></td> <td class="paramname"><span class="paramname"><em>handle</em></span>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">unsigned char *</td> <td class="paramname"><span class="paramname"><em>trigger</em></span>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">unsigned char *</td> <td class="paramname"><span class="paramname"><em>polarity</em></span> )</td>
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</div><div class="memdoc">
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<p>Enable the device's PCI interrupt. </p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir"></td><td class="paramname">vbus</td><td>Capability of the system bus </td></tr>
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<tr><td class="paramdir"></td><td class="paramname">handle</td><td>Device handle of the PCI device </td></tr>
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<tr><td class="paramdir">[out]</td><td class="paramname">trigger</td><td>False if interrupt is level-triggered </td></tr>
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<tr><td class="paramdir">[out]</td><td class="paramname">polarity</td><td>True if interrupt is of low polarity</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>On success: Interrupt line to be used, else failure </dd></dl>
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<p class="reference">References <a class="el" href="compiler_8h_source.html#l00166">L4_END_DECLS</a>.</p>
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<p class="reference">Referenced by <a class="el" href="vbus__pci_source.html#l00137">L4vbus::Pci_dev::irq_enable()</a>.</p>
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