199 lines
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HTML
199 lines
24 KiB
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<div id="projectname">L4Re Operating System Framework
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<div id="projectbrief">Interface and Usage Documentation</div>
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<div class="contents">
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<div class="textblock">Here is a list of all documented struct and union fields with links to the struct/union documentation for each field:</div>
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<h3 class="doxsection"><a id="index_c" name="index_c"></a>- c -</h3><ul>
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<li>c() : <a class="el" href="classL4_1_1Kobject__2t.html#a6cfe1a4cb8f54e06479410f0f2a6e31c">L4::Kobject_2t< Derived, Base1, Base2, PROTO, S_DEMAND ></a>, <a class="el" href="structL4_1_1Kobject__3t.html#af141ddcdb35cd25c1984ac438c71a45b">L4::Kobject_3t< Derived, Base1, Base2, Base3, PROTO, S_DEMAND ></a>, <a class="el" href="classL4_1_1Kobject__t.html#a3d80fec7e057d575ec4b393437f05f8a">L4::Kobject_t< Derived, Base, PROTO, S_DEMAND ></a></li>
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<li>C_bits : <a class="el" href="classcxx_1_1Bitmap__base.html#a4562584344b3c0251bfaf5e34bc38749ad2de31016bb1c41cd56e4c9bbac30dde">cxx::Bitmap_base</a>, <a class="el" href="classL4Re_1_1Util_1_1Bitmap__base.html#a4562584344b3c0251bfaf5e34bc38749ad2de31016bb1c41cd56e4c9bbac30dde">L4Re::Util::Bitmap_base</a></li>
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<li>Cache_buffered : <a class="el" href="structL4Re_1_1Rm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989a7699ea952cd1af941e52d40ef60be81e">L4Re::Rm::F</a>, <a class="el" href="structRm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989a7699ea952cd1af941e52d40ef60be81e">Rm::F</a></li>
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<li>Cache_normal : <a class="el" href="structL4Re_1_1Rm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989a91da4a396eae78b88b9f0e54459e13e4">L4Re::Rm::F</a>, <a class="el" href="structRm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989a91da4a396eae78b88b9f0e54459e13e4">Rm::F</a></li>
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<li>Cache_uncached : <a class="el" href="structL4Re_1_1Rm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989a015538d2c417419e97ccb14be6fea5cb">L4Re::Rm::F</a>, <a class="el" href="structRm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989a015538d2c417419e97ccb14be6fea5cb">Rm::F</a></li>
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<li>Cacheable : <a class="el" href="structL4Re_1_1Dataspace_1_1F.html#a62af1272cb958fe0f6cb5e2ab07c2df2aa855f0a7682abd2761b6e0d9491a635e">L4Re::Dataspace::F</a></li>
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<li>Cached : <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#a6c3ef306df19fd2a6f2e03ca4b79b1aea5bd6ca5e5a2e34bcc3d4753805616f46">L4::Ipc::Snd_fpage</a></li>
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<li>Cacheopt : <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#a6c3ef306df19fd2a6f2e03ca4b79b1ae">L4::Ipc::Snd_fpage</a></li>
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<li>Caching_mask : <a class="el" href="structL4Re_1_1Dataspace_1_1F.html#a62af1272cb958fe0f6cb5e2ab07c2df2a746134323fd92f1c52ce72541be70dc8">L4Re::Dataspace::F</a>, <a class="el" href="structL4Re_1_1Rm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989abe676f4020fe53d1366fd431c7927fd9">L4Re::Rm::F</a>, <a class="el" href="structRm_1_1F.html#a9707a14d822d3f60aa6a97cb16b2a989abe676f4020fe53d1366fd431c7927fd9">Rm::F</a></li>
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<li>Caching_shift : <a class="el" href="structL4Re_1_1Dataspace_1_1F.html#a128dd9de4f39d1175ff12544909b5354a3dfc610fc48683e6bd3b87d5f5df64d1">L4Re::Dataspace::F</a>, <a class="el" href="classL4Re_1_1Rm.html#a6c519437e7be883723e43f80ea42ce87aac2055075c855e3496dfcaa5060358e9">L4Re::Rm</a>, <a class="el" href="classRm.html#a6c519437e7be883723e43f80ea42ce87aac2055075c855e3496dfcaa5060358e9">Rm</a></li>
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<li>call() : <a class="el" href="classL4_1_1Arm__smccc.html#adc03a48c7bdb90ce9c5021192dfde0c2">L4::Arm_smccc</a>, <a class="el" href="classL4_1_1Ipc_1_1Iostream.html#a18ac55dddefc29f84d47935dbc86b7ca">L4::Ipc::Iostream</a></li>
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<li>Cap() : <a class="el" href="classL4_1_1Cap.html#ad1e95bcebda8bb53959bb2c7bf4e159e">L4::Cap< T ></a>, <a class="el" href="classL4_1_1Ipc_1_1Cap.html#ab065b8558d628794dbe8f8060081700d">L4::Ipc::Cap< T ></a></li>
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<li>cap() : <a class="el" href="classL4_1_1Cap__base.html#a90ff089ca2442b128c2b2b0e1c22c6d7">L4::Cap_base</a>, <a class="el" href="classL4_1_1Invalid__capability.html#a52b0b4ced881b8000adca5beb745ac7f">L4::Invalid_capability</a>, <a class="el" href="classL4_1_1Ipc_1_1Cap.html#a9fe4c1bed7efd009bf5fdb7db3735d15">L4::Ipc::Cap< T ></a>, <a class="el" href="classL4_1_1Kobject.html#a4f2117ae76762f4084e6a1adb915863c">L4::Kobject</a>, <a class="el" href="structl4re__env__cap__entry__t.html#a2027e219842d2e7f2bca77b5839d07b4">l4re_env_cap_entry_t</a></li>
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<li>Cap_base() : <a class="el" href="classL4_1_1Cap__base.html#ad51e36743fd47c161ffb23f4e8c4f706">L4::Cap_base</a></li>
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<li>Cap_entry : <a class="el" href="classL4Re_1_1Env.html#a6f210542f5090254dc7c93826ce2fcc0">L4Re::Env</a></li>
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<li>cap_equal() : <a class="el" href="classL4_1_1Task.html#ac3a7a5e423b0b47ed028a6616fe74415">L4::Task</a></li>
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<li>Cap_mask : <a class="el" href="classL4_1_1Ipc_1_1Cap.html#ab12eac56a83b358f1f5d480fa62f148ca4c12030e3e9d4986e5a20a1aabfeb20e">L4::Ipc::Cap< T ></a></li>
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<li>cap_received() : <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#af9b4655a879646d2e79818e71ef28d81">L4::Ipc::Snd_fpage</a></li>
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<li>Cap_type : <a class="el" href="classL4_1_1Cap__base.html#ac74dbedb04347341ba30ece923c12fe7">L4::Cap_base</a></li>
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<li>cap_valid() : <a class="el" href="classL4_1_1Task.html#ac2099a8cdf44b31d8bdcce6d758f8f98">L4::Task</a></li>
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<li>capacity : <a class="el" href="structl4virtio__block__config__t.html#a8d33adcab68fa2ad5eb07f79717c8891">l4virtio_block_config_t</a></li>
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<li>Caps : <a class="el" href="structL4_1_1Type__info_1_1Demand__t.html#a2a3912023ec87e9cfd3220c218dc99eda2eed15cb41a7fa633684beff9c6ae228">L4::Type_info::Demand_t< CAPS, FLAGS, MEM, PORTS ></a></li>
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<li>caps : <a class="el" href="classL4_1_1Type__info_1_1Demand.html#a4dbd6d51c51a69edde7a7fc1224cb30e">L4::Type_info::Demand</a>, <a class="el" href="structl4__vm__vmx__vcpu__infos__t.html#a168647389b9b0128f543e182f37ca8a7">l4_vm_vmx_vcpu_infos_t</a>, <a class="el" href="structl4re__env__t.html#aa4df7f0e98c386f99b1dd35ddfe7613e">l4re_env_t</a></li>
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<li>cast() : <a class="el" href="classL4vcpu_1_1Vcpu.html#a2cffae209f093fc6d4745204f5a0f134">L4vcpu::Vcpu</a></li>
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<li>cfg_changed() : <a class="el" href="classL4virtio_1_1Svr_1_1Device__t.html#a2c191fe0524b519a6262f557ebf9f2be">L4virtio::Svr::Device_t< DATA ></a></li>
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<li>cfg_read() : <a class="el" href="classL4vbus_1_1Pci__dev.html#a20658b5eb70c4773b369a0a3c8c88582">L4vbus::Pci_dev</a>, <a class="el" href="classL4vbus_1_1Pci__host__bridge.html#a4441432f00e007ee3a738866238938f0">L4vbus::Pci_host_bridge</a></li>
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<li>cfg_write() : <a class="el" href="classL4vbus_1_1Pci__dev.html#a1cc8e109638d49502d08484d05c7b244">L4vbus::Pci_dev</a>, <a class="el" href="classL4vbus_1_1Pci__host__bridge.html#ad316f6aeb09ecd36bc7aafa988dd272e">L4vbus::Pci_host_bridge</a></li>
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<li>change_mode() : <a class="el" href="classL4_1_1Uart.html#ac70a395c14b85b77b9d824c54e005bdb">L4::Uart</a>, <a class="el" href="classL4_1_1Uart__apb.html#aea2ca3bc001d527837f5af2f63ba9d21">L4::Uart_apb</a></li>
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<li>change_queue_config() : <a class="el" href="classL4virtio_1_1Svr_1_1Dev__config.html#a6e2930c86af691b5379cf45f253bad1d">L4virtio::Svr::Dev_config</a></li>
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<li>char_avail() : <a class="el" href="classL4_1_1Uart.html#aa44d60597fcc30a084bd4491075210c6">L4::Uart</a>, <a class="el" href="classL4_1_1Uart__apb.html#aa61b08fb092349740c445c05a0837402">L4::Uart_apb</a></li>
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<li>chars() : <a class="el" href="classcxx_1_1Bitmap__base.html#a21e69a026c39cc3eb3855f765dc896d9">cxx::Bitmap_base</a>, <a class="el" href="classL4Re_1_1Util_1_1Bitmap__base.html#a21e69a026c39cc3eb3855f765dc896d9">L4Re::Util::Bitmap_base</a></li>
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<li>check_castable_from() : <a class="el" href="classL4_1_1Cap.html#aa7df6af25ea6423cd8b0f9410b4e0df8">L4::Cap< T ></a></li>
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<li>check_convertible_from() : <a class="el" href="classL4_1_1Cap.html#af6d917bed9c7455862b14086dd3f4efa">L4::Cap< T ></a></li>
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<li>check_features() : <a class="el" href="classL4virtio_1_1Svr_1_1Console_1_1Virtio__con.html#a68d5e6ef1b7a3d192396805724ee4bdc">L4virtio::Svr::Console::Virtio_con</a>, <a class="el" href="classL4virtio_1_1Svr_1_1Device__t.html#a858188800d304a06069db6c04020fc47">L4virtio::Svr::Device_t< DATA ></a>, <a class="el" href="classVirtio__net.html#a38732397afc04ffd1792d22aa0e39f36">Virtio_net</a></li>
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<li>check_ports() : <a class="el" href="classVirtio__switch.html#a5b5b4ab52f242c7f829234b9165ab14c">Virtio_switch</a></li>
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<li>check_queues() : <a class="el" href="classL4virtio_1_1Svr_1_1Console_1_1Virtio__con.html#a05dafd1c2afd4c83381de815d42fda9b">L4virtio::Svr::Console::Virtio_con</a>, <a class="el" href="classL4virtio_1_1Svr_1_1Device__t.html#afd67e955eac6db54cbe5a479102b1a95">L4virtio::Svr::Device_t< DATA ></a>, <a class="el" href="classL4virtio_1_1Svr_1_1Virtio__gpio.html#a7b9130ce0f29ea70d94708d1e7f115de">L4virtio::Svr::Virtio_gpio< Request_handler, Epiface ></a>, <a class="el" href="classL4virtio_1_1Svr_1_1Virtio__i2c.html#a7ef80b18ecd64d7c2153d88d458520de">L4virtio::Svr::Virtio_i2c< Request_handler, Epiface ></a>, <a class="el" href="classL4virtio_1_1Svr_1_1Virtio__rng.html#ae405894e96aae22477549b41b443aa77">L4virtio::Svr::Virtio_rng< Rnd_state, Epiface ></a>, <a class="el" href="classVirtio__net.html#a79c39a6fe6436722b983385610ad82af">Virtio_net</a></li>
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<li>check_ready() : <a class="el" href="classL4Re_1_1Vfs_1_1Be__file.html#a21eb685967c70248570b53204922e331">L4Re::Vfs::Be_file</a>, <a class="el" href="classL4Re_1_1Vfs_1_1Generic__file.html#addbfcce2d915bf9e8ce6716c3bfe6114">L4Re::Vfs::Generic_file</a></li>
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<li>Class : <a class="el" href="classL4_1_1Kobject__2t.html#a12e381ce5a3274fe36b68f6a621961f2">L4::Kobject_2t< Derived, Base1, Base2, PROTO, S_DEMAND ></a>, <a class="el" href="structL4_1_1Kobject__3t.html#a749170ca3fd9a60b40245aea3a488e47">L4::Kobject_3t< Derived, Base1, Base2, Base3, PROTO, S_DEMAND ></a>, <a class="el" href="classL4_1_1Kobject__t.html#af7df35ba5bf68ef5993e605a6b62328a">L4::Kobject_t< Derived, Base, PROTO, S_DEMAND ></a></li>
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<li>clear() : <a class="el" href="classcxx_1_1Bits_1_1Basic__list.html#a2bb023a320eee0dc30fa3c8efe7e5f45">cxx::Bits::Basic_list< POLICY ></a>, <a class="el" href="classL4_1_1Types_1_1Flags.html#a0e3e88cfb8f9fdea1954c40ace21611f">L4::Types::Flags< BITS_ENUM, UNDERLYING ></a>, <a class="el" href="classL4drivers_1_1Register__tmpl.html#a3478144684715d38a6bee16debf7e11f">L4drivers::Register_tmpl< BITS, BLOCK ></a>, <a class="el" href="classL4Re_1_1Dataspace.html#aec6654feafb167a373e056b326a99151">L4Re::Dataspace</a>, <a class="el" href="classL4Re_1_1Util_1_1Dataspace__svr.html#ac20641a3871785e42a36906745eebca0">L4Re::Util::Dataspace_svr</a>, <a class="el" href="classL4vcpu_1_1State.html#ad5a1e16dfef69c5d359f6cac6c05a53c">L4vcpu::State</a></li>
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<li>clear_bit() : <a class="el" href="classcxx_1_1Bitmap__base.html#aa45d3ffd33e0040624919f3c250683fb">cxx::Bitmap_base</a>, <a class="el" href="classL4Re_1_1Util_1_1Bitmap__base.html#aa45d3ffd33e0040624919f3c250683fb">L4Re::Util::Bitmap_base</a></li>
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<li>cmdline : <a class="el" href="structl4util__l4mod__info.html#ae5dfd76284eba10c980915f7535b8b77">l4util_l4mod_info</a>, <a class="el" href="structl4util__l4mod__mod.html#a9ea0e6369a698e1987ab12389ebbfde1">l4util_l4mod_mod</a>, <a class="el" href="structl4util__mb__info__t.html#aa3c37b5b4a11d0d22c81fca1c5be4bbd">l4util_mb_info_t</a>, <a class="el" href="structl4util__mb__mod__t.html#ac86ef0e9e64b50f50d4d75b06b595dea">l4util_mb_mod_t</a></li>
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<li>code : <a class="el" href="structL4Re_1_1Default__event__payload.html#ad95712bc396c767d7dacee15a0f6d68a">L4Re::Default_event_payload</a>, <a class="el" href="structl4re__event__t.html#a3739517171cc1e9bdb8bf8d6005dfdfe">l4re_event_t</a></li>
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<li>Coherent : <a class="el" href="classL4Re_1_1Dma__space.html#a676ff57e99cc0d8f53dc33aeadfe764fa79a5029635ce524856adc52e8927f3f4">L4Re::Dma_space</a></li>
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<li>Color_component() : <a class="el" href="classL4Re_1_1Video_1_1Color__component.html#aa52df69a0b126ddd5ea460ef6292d665">L4Re::Video::Color_component</a></li>
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<li>Com_error() : <a class="el" href="classL4_1_1Com__error.html#a382f4c5d3ef75f19b26fdd952d9e56bd">L4::Com_error</a></li>
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<li>Compound : <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#af8eb4e47d01a9c57bb868e24e345aaefac0f8df5c1ed2225c87dc9e5d62ab4512">L4::Ipc::Snd_fpage</a></li>
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<li>config_get() : <a class="el" href="classL4vbus_1_1Gpio__pin.html#a54ee77ed07f1803a783c14e0da349311">L4vbus::Gpio_pin</a></li>
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<li>config_pad() : <a class="el" href="classL4vbus_1_1Gpio__module.html#a353f5c9e3e0c77b57308c0f2b21de582">L4vbus::Gpio_module</a>, <a class="el" href="classL4vbus_1_1Gpio__pin.html#adea98e966587fcf7389306cc6c6bd709">L4vbus::Gpio_pin</a></li>
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<li>config_pull() : <a class="el" href="classL4vbus_1_1Gpio__pin.html#a93461ca18d84a88dc78364a129ee6168">L4vbus::Gpio_pin</a></li>
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<li>config_queue() : <a class="el" href="classL4virtio_1_1Device.html#a47218ed005d79308d0e297d1a731a517">L4virtio::Device</a>, <a class="el" href="classL4virtio_1_1Driver_1_1Device.html#aa557ba0e56fbfc194b07440ecc796061">L4virtio::Driver::Device</a></li>
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<li>config_table : <a class="el" href="structl4util__mb__info__t.html#aa619d197d7e846234c9d17c468c43444">l4util_mb_info_t</a></li>
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<li>console_multiport() : <a class="el" href="structL4virtio_1_1Svr_1_1Console_1_1Features.html#ab2a934d203c8f5e8ebe93463ed5aa094">L4virtio::Svr::Console::Features</a></li>
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<li>console_multiport_bfm_t : <a class="el" href="structL4virtio_1_1Svr_1_1Console_1_1Features.html#a68272a1fb6763872dae128a2f60f10bd">L4virtio::Svr::Console::Features</a></li>
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<li>Console_port : <a class="el" href="structL4virtio_1_1Svr_1_1Console_1_1Control__message.html#a47d3b7eb9911ef9b693250331174e981a5153819c01fcc63725eefb1f7ca5140c">L4virtio::Svr::Console::Control_message</a></li>
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<li>console_size() : <a class="el" href="structL4virtio_1_1Svr_1_1Console_1_1Features.html#adbaf841fda10ff379ddaaf6d12725a69">L4virtio::Svr::Console::Features</a></li>
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<li>console_size_bfm_t : <a class="el" href="structL4virtio_1_1Svr_1_1Console_1_1Features.html#af6b4d3a3eeb7e01ad5d7e510fef4143b">L4virtio::Svr::Console::Features</a></li>
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<li>Const_item_type : <a class="el" href="classcxx_1_1Bits_1_1Base__avl__set.html#ac238262fe8de67a57b66fc448305fb74">cxx::Bits::Base_avl_set< ITEM_TYPE, COMPARE, ALLOC, GET_KEY ></a></li>
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<li>Const_iterator : <a class="el" href="classcxx_1_1Avl__tree.html#a92ff10953437d00df4694b13abd8b961">cxx::Avl_tree< Node, Get_key, Compare ></a>, <a class="el" href="classcxx_1_1Bits_1_1Base__avl__set.html#adf5292c8b529cf9caf53855b96136cd7">cxx::Bits::Base_avl_set< ITEM_TYPE, COMPARE, ALLOC, GET_KEY ></a>, <a class="el" href="classcxx_1_1Bits_1_1Bst.html#a81b48d62c079d40d94a3dd03335fff1b">cxx::Bits::Bst< Node, Get_key, Compare ></a></li>
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<li>Const_rev_iterator : <a class="el" href="classcxx_1_1Avl__tree.html#aeed2bce893fae74ffbec8041a1c0986f">cxx::Avl_tree< Node, Get_key, Compare ></a>, <a class="el" href="classcxx_1_1Bits_1_1Base__avl__set.html#a9a0532334b146963c70051d1cbcdef1a">cxx::Bits::Base_avl_set< ITEM_TYPE, COMPARE, ALLOC, GET_KEY ></a>, <a class="el" href="classcxx_1_1Bits_1_1Bst.html#a01c39d894ae881d97b89a8d2eb37ed28">cxx::Bits::Bst< Node, Get_key, Compare ></a></li>
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<li>consumed() : <a class="el" href="classL4virtio_1_1Svr_1_1Virtqueue.html#af6577deb37b3685815f9ae52760390db">L4virtio::Svr::Virtqueue</a></li>
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<li>contains() : <a class="el" href="classL4virtio_1_1Svr_1_1Driver__mem__region__t.html#a11384549e18dc249846201ac410400ac">L4virtio::Svr::Driver_mem_region_t< DATA ></a></li>
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<li>Continue : <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#af8eb4e47d01a9c57bb868e24e345aaef">L4::Ipc::Snd_fpage</a></li>
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<li>Continuous : <a class="el" href="classL4Re_1_1Mem__alloc.html#a47f3e054def977c17dbf60bfbb4ee05ea24aed4d1617b5d1247f03ff81f828b1c">L4Re::Mem_alloc</a></li>
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<li>control() : <a class="el" href="classL4_1_1Thread.html#a4252cd0ad4bdfa00cdc61b5fd2317aef">L4::Thread</a></li>
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<li>Conventional : <a class="el" href="classL4_1_1Kip_1_1Mem__desc.html#ac7fb06d56bc504ab5821bc05fe5be9fda33c3f71fd189f3a5d46005a9b80f22d8">L4::Kip::Mem_desc</a></li>
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<li>copy() : <a class="el" href="classL4_1_1Cap.html#a03750491e2cb888d26e2fbdfcc0b7dbc">L4::Cap< T ></a>, <a class="el" href="classL4_1_1Cap__base.html#a1501f9852fda4c01a1591a7c53585d5f">L4::Cap_base</a>, <a class="el" href="classL4Re_1_1Smart__count__cap.html#a4f5fee6c54e153aba5b2cf33e4c5c5ec">L4Re::Smart_count_cap< Unmap_flags ></a>, <a class="el" href="classL4Re_1_1Util_1_1Dataspace__svr.html#ae43d4d403894536dd261a834e2bcc417">L4Re::Util::Dataspace_svr</a>, <a class="el" href="classL4Re_1_1Util_1_1Smart__count__cap.html#a5886f75acada6cddee1b8c3192476b93">L4Re::Util::Smart_count_cap< Unmap_flags ></a></li>
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<li>copy_header() : <a class="el" href="classNet__transfer.html#a03a0e6103c0f7d31bdce2150dc45e7c5">Net_transfer</a></li>
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<li>copy_in() : <a class="el" href="structL4_1_1Ipc_1_1Array__in__buf.html#a894c69803a43d8b76646524fc0e6b605">L4::Ipc::Array_in_buf< ELEM_TYPE, LEN_TYPE, MAX ></a>, <a class="el" href="classL4Re_1_1Dataspace.html#a21ba4a8d1053498647834e622daf285a">L4Re::Dataspace</a></li>
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<li>copy_pkt() : <a class="el" href="classVirtio__vlan__mangle.html#affcb6c9ab833a401b1b6d914c44ad81f">Virtio_vlan_mangle</a></li>
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<li>copy_receive_cap() : <a class="el" href="classL4Re_1_1Util_1_1Names_1_1Name__space.html#ab36cf947bcdba9218c9d9dafe7475788">L4Re::Util::Names::Name_space</a></li>
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<li>copy_to() : <a class="el" href="structL4virtio_1_1Svr_1_1Data__buffer.html#a0ae0d4405b3a3ae5aa554b3adece0138">L4virtio::Svr::Data_buffer</a></li>
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<li>count() : <a class="el" href="classL4_1_1Kip_1_1Mem__desc.html#ae34a236e598d0ff82dea58340dd0554d">L4::Kip::Mem_desc</a></li>
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<li>Counting_cap_alloc() : <a class="el" href="classL4Re_1_1Util_1_1Counting__cap__alloc.html#af2fe4673eb75d7badb49a3615673f169">L4Re::Util::Counting_cap_alloc< COUNTERTYPE, Dbg ></a></li>
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<li>cpsr : <a class="el" href="structl4__exc__regs__t.html#af85a6238c254623b6f6b049a7fc47482">l4_exc_regs_t</a></li>
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<li>cpu_allow_shutdown() : <a class="el" href="classL4_1_1Platform__control.html#a9af4bb0f88e31db3129850e81c557401">L4::Platform_control</a></li>
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<li>cpu_disable() : <a class="el" href="classL4_1_1Platform__control.html#a38e731ee2e7abd5a7a7fb2c11c39282c">L4::Platform_control</a></li>
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<li>cpu_enable() : <a class="el" href="classL4_1_1Platform__control.html#a56143521c092c7c40a0c8216ad750969">L4::Platform_control</a></li>
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<li>create() : <a class="el" href="classL4_1_1Factory.html#ab52604d4abed4d6009ce51a59492edd7">L4::Factory</a></li>
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<li>create_buffer() : <a class="el" href="classL4Re_1_1Video_1_1Goos.html#a2354fbda983143ba3cd81b1744fde319">L4Re::Video::Goos</a></li>
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<li>create_factory() : <a class="el" href="classL4_1_1Factory.html#a014721aec27ad4877555d5f4b7204896">L4::Factory</a></li>
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<li>create_gate() : <a class="el" href="classL4_1_1Factory.html#a79b67bcf639db7fd92b399d44ab272a8">L4::Factory</a></li>
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<li>create_task() : <a class="el" href="classL4_1_1Factory.html#a491c8f5113bb68cd402db1eb59ac76ea">L4::Factory</a></li>
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<li>create_thread_group() : <a class="el" href="classL4_1_1Factory.html#a6b0504bc01000ccbeaf137b20e7284c5">L4::Factory</a></li>
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<li>create_view() : <a class="el" href="classL4Re_1_1Video_1_1Goos.html#ab2961aaf280f2d0c16245d112b0ef100">L4Re::Video::Goos</a></li>
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<li>cs : <a class="el" href="structl4__vcpu__regs__t.html#a9ab4f8dc60e57e43c233659a4c96d62b">l4_vcpu_regs_t</a></li>
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<li>cur_buf() : <a class="el" href="classNet__transfer.html#ae6ef29e7ea5ef5e5e9577b0be3a3b62f">Net_transfer</a></li>
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<li>current_flags() : <a class="el" href="classL4virtio_1_1Svr_1_1Request__processor.html#a5812ffd879efda9ed45d3248b21eb0d3">L4virtio::Svr::Request_processor</a></li>
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<li>cx : <a class="el" href="structl4__vcpu__regs__t.html#a67b367032b745f2213c60c2f1244f2e9">l4_vcpu_regs_t</a></li>
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</ul>
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