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<div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno"> 1</span><span class="comment">// vi:set ft=cpp: -*- Mode: C++ -*-</span></div>
<div class="line"><a id="l00002" name="l00002"></a><span class="lineno"> 2</span><span class="comment">/*</span></div>
<div class="line"><a id="l00003" name="l00003"></a><span class="lineno"> 3</span><span class="comment"> * (c) 2014 Sarah Hoffmann &lt;sarah.hoffmann@kernkonzept.com&gt;</span></div>
<div class="line"><a id="l00004" name="l00004"></a><span class="lineno"> 4</span><span class="comment"> *</span></div>
<div class="line"><a id="l00005" name="l00005"></a><span class="lineno"> 5</span><span class="comment"> * License: see LICENSE.spdx (in this directory or the directories above)</span></div>
<div class="line"><a id="l00006" name="l00006"></a><span class="lineno"> 6</span><span class="comment"> */</span></div>
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno"> 7</span> </div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno"> 8</span><span class="preprocessor">#pragma once</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno"> 9</span> </div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno"> 10</span><span class="preprocessor">#include &lt;l4/vbus/vbus&gt;</span></div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno"> 11</span><span class="preprocessor">#include &lt;l4/vbus/vbus_pci.h&gt;</span></div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno"> 12</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno"> 18</span> </div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno"> 19</span><span class="keyword">namespace </span><a class="code hl_namespace" href="namespaceL4vbus.html">L4vbus</a> {</div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno"> 20</span></div>
<div class="foldopen" id="foldopen00025" data-start="{" data-end="};">
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__host__bridge.html"> 25</a></span><span class="keyword">class </span><a class="code hl_class" href="classL4vbus_1_1Pci__host__bridge.html">Pci_host_bridge</a> : <span class="keyword">public</span> <a class="code hl_function" href="classL4vbus_1_1Device.html#a487d5e145d3a21935b61cc231cd84cec">Device</a></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno"> 26</span>{</div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno"> 27</span><span class="keyword">public</span>:</div>
<div class="foldopen" id="foldopen00039" data-start="{" data-end="}">
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__host__bridge.html#a4441432f00e007ee3a738866238938f0"> 39</a></span> <span class="keywordtype">int</span> <a class="code hl_function" href="classL4vbus_1_1Pci__host__bridge.html#a4441432f00e007ee3a738866238938f0">cfg_read</a>(<a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> bus, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> devfn, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg,</div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno"> 40</span> <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> *value, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)<span class="keyword"> const</span></div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno"> 41</span><span class="keyword"> </span>{</div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno"> 42</span> <span class="keywordflow">return</span> <a class="code hl_function" href="group__l4vbus__pci__module.html#ga25822b176d2142cac40239f3db9ed7f0">l4vbus_pci_cfg_read</a>(<a class="code hl_function" href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">bus_cap</a>().cap(), <a class="code hl_variable" href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">_dev</a>, bus,</div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno"> 43</span> devfn, reg, value, width);</div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno"> 44</span> }</div>
</div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno"> 45</span> </div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno"> 46</span></div>
<div class="foldopen" id="foldopen00058" data-start="{" data-end="}">
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__host__bridge.html#ad316f6aeb09ecd36bc7aafa988dd272e"> 58</a></span> <span class="keywordtype">int</span> <a class="code hl_function" href="classL4vbus_1_1Pci__host__bridge.html#ad316f6aeb09ecd36bc7aafa988dd272e">cfg_write</a>(<a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> bus, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> devfn, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg,</div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno"> 59</span> <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> value, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)<span class="keyword"> const</span></div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno"> 60</span><span class="keyword"> </span>{</div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno"> 61</span> <span class="keywordflow">return</span> <a class="code hl_function" href="group__l4vbus__pci__module.html#ga5d4daafe0f275a28a5ba1941cfdfa837">l4vbus_pci_cfg_write</a>(<a class="code hl_function" href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">bus_cap</a>().cap(), <a class="code hl_variable" href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">_dev</a>, bus,</div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno"> 62</span> devfn, reg, value, width);</div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno"> 63</span> }</div>
</div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno"> 64</span> </div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno"> 65</span></div>
<div class="foldopen" id="foldopen00079" data-start="{" data-end="}">
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__host__bridge.html#a4f405f52b078609d885e5331922447f1"> 79</a></span> <span class="keywordtype">int</span> <a class="code hl_function" href="classL4vbus_1_1Pci__host__bridge.html#a4f405f52b078609d885e5331922447f1">irq_enable</a>(<a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> bus, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> devfn, <span class="keywordtype">int</span> pin,</div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"> 80</span> <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> *trigger, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> *polarity)<span class="keyword"> const</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno"> 81</span><span class="keyword"> </span>{</div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"> 82</span> <span class="keywordflow">return</span> <a class="code hl_function" href="group__l4vbus__pci__module.html#gad35bdd82e72df73ba00badf6cfe7cf6c">l4vbus_pci_irq_enable</a>(<a class="code hl_function" href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">bus_cap</a>().cap(), <a class="code hl_variable" href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">_dev</a>, bus,</div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno"> 83</span> devfn, pin, trigger, polarity);</div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"> 84</span> }</div>
</div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno"> 85</span> </div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"> 86</span>};</div>
</div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno"> 87</span> </div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno"> 88</span></div>
<div class="foldopen" id="foldopen00093" data-start="{" data-end="};">
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__dev.html"> 93</a></span><span class="keyword">class </span><a class="code hl_class" href="classL4vbus_1_1Pci__dev.html">Pci_dev</a> : <span class="keyword">public</span> <a class="code hl_function" href="classL4vbus_1_1Device.html#a487d5e145d3a21935b61cc231cd84cec">Device</a></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"> 94</span>{</div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"> 95</span><span class="keyword">public</span>:</div>
<div class="foldopen" id="foldopen00105" data-start="{" data-end="}">
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__dev.html#a20658b5eb70c4773b369a0a3c8c88582"> 105</a></span> <span class="keywordtype">int</span> <a class="code hl_function" href="classL4vbus_1_1Pci__dev.html#a20658b5eb70c4773b369a0a3c8c88582">cfg_read</a>(<a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> *value,</div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno"> 106</span> <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)<span class="keyword"> const</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno"> 107</span><span class="keyword"> </span>{</div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno"> 108</span> <span class="keywordflow">return</span> <a class="code hl_function" href="group__l4vbus__pci__module.html#gaf6db088ef60ca6f09dbfb50a4b34ae32">l4vbus_pcidev_cfg_read</a>(<a class="code hl_function" href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">bus_cap</a>().cap(), <a class="code hl_variable" href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">_dev</a>, reg, value, width);</div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno"> 109</span> }</div>
</div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno"> 110</span> </div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno"> 111</span></div>
<div class="foldopen" id="foldopen00121" data-start="{" data-end="}">
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__dev.html#a1cc8e109638d49502d08484d05c7b244"> 121</a></span> <span class="keywordtype">int</span> <a class="code hl_function" href="classL4vbus_1_1Pci__dev.html#a1cc8e109638d49502d08484d05c7b244">cfg_write</a>(<a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> reg, <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> value,</div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno"> 122</span> <a class="code hl_typedef" href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a> width)<span class="keyword"> const</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno"> 123</span><span class="keyword"> </span>{</div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno"> 124</span> <span class="keywordflow">return</span> <a class="code hl_function" href="group__l4vbus__pci__module.html#gaed48c2e41fa4fc7cefeaca2b15b34aa5">l4vbus_pcidev_cfg_write</a>(<a class="code hl_function" href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">bus_cap</a>().cap(), <a class="code hl_variable" href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">_dev</a>, reg, value, width);</div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno"> 125</span> }</div>
</div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno"> 126</span> </div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno"> 127</span></div>
<div class="foldopen" id="foldopen00137" data-start="{" data-end="}">
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno"><a class="line" href="classL4vbus_1_1Pci__dev.html#ace3784b8e44e44dc14c1cee121500b89"> 137</a></span> <span class="keywordtype">int</span> <a class="code hl_function" href="classL4vbus_1_1Pci__dev.html#ace3784b8e44e44dc14c1cee121500b89">irq_enable</a>(<span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> *trigger, <span class="keywordtype">unsigned</span> <span class="keywordtype">char</span> *polarity)<span class="keyword"> const</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno"> 138</span><span class="keyword"> </span>{</div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno"> 139</span> <span class="keywordflow">return</span> <a class="code hl_function" href="group__l4vbus__pci__module.html#ga71117c2627ed84dc404d6fc4582b9ec5">l4vbus_pcidev_irq_enable</a>(<a class="code hl_function" href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">bus_cap</a>().cap(), <a class="code hl_variable" href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">_dev</a>, trigger, polarity);</div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno"> 140</span> }</div>
</div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno"> 141</span> </div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno"> 142</span>};</div>
</div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno"> 143</span> </div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno"> 144</span>}</div>
<div class="ttc" id="aclassL4vbus_1_1Device_html_a286c71ba7f0ab66fd9d90a9e91dfa560"><div class="ttname"><a href="classL4vbus_1_1Device.html#a286c71ba7f0ab66fd9d90a9e91dfa560">L4vbus::Device::bus_cap</a></div><div class="ttdeci">L4::Cap&lt; Vbus &gt; bus_cap() const</div><div class="ttdoc">Access the Vbus capability of the underlying virtual bus.</div><div class="ttdef"><b>Definition</b> <a href="vbus_source.html#l00107">vbus:107</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Device_html_a487d5e145d3a21935b61cc231cd84cec"><div class="ttname"><a href="classL4vbus_1_1Device.html#a487d5e145d3a21935b61cc231cd84cec">L4vbus::Device::Device</a></div><div class="ttdeci">Device()</div><div class="ttdoc">Construct a new vbus device using the NULL device L4VBUS_NULL.</div><div class="ttdef"><b>Definition</b> <a href="vbus_source.html#l00089">vbus:89</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Device_html_ac055a07e37da8daa7b3a93cc833a6434"><div class="ttname"><a href="classL4vbus_1_1Device.html#ac055a07e37da8daa7b3a93cc833a6434">L4vbus::Device::_dev</a></div><div class="ttdeci">l4vbus_device_handle_t _dev</div><div class="ttdoc">The device handle for this device.</div><div class="ttdef"><b>Definition</b> <a href="vbus_source.html#l00247">vbus:247</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__dev_html"><div class="ttname"><a href="classL4vbus_1_1Pci__dev.html">L4vbus::Pci_dev</a></div><div class="ttdoc">A PCI device.</div><div class="ttdef"><b>Definition</b> <a href="#l00093">vbus_pci:94</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__dev_html_a1cc8e109638d49502d08484d05c7b244"><div class="ttname"><a href="classL4vbus_1_1Pci__dev.html#a1cc8e109638d49502d08484d05c7b244">L4vbus::Pci_dev::cfg_write</a></div><div class="ttdeci">int cfg_write(l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) const</div><div class="ttdoc">Write to the device&#39;s vPCI configuration space.</div><div class="ttdef"><b>Definition</b> <a href="#l00121">vbus_pci:121</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__dev_html_a20658b5eb70c4773b369a0a3c8c88582"><div class="ttname"><a href="classL4vbus_1_1Pci__dev.html#a20658b5eb70c4773b369a0a3c8c88582">L4vbus::Pci_dev::cfg_read</a></div><div class="ttdeci">int cfg_read(l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) const</div><div class="ttdoc">Read from the device&#39;s vPCI configuration space.</div><div class="ttdef"><b>Definition</b> <a href="#l00105">vbus_pci:105</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__dev_html_ace3784b8e44e44dc14c1cee121500b89"><div class="ttname"><a href="classL4vbus_1_1Pci__dev.html#ace3784b8e44e44dc14c1cee121500b89">L4vbus::Pci_dev::irq_enable</a></div><div class="ttdeci">int irq_enable(unsigned char *trigger, unsigned char *polarity) const</div><div class="ttdoc">Enable the device&#39;s PCI interrupt.</div><div class="ttdef"><b>Definition</b> <a href="#l00137">vbus_pci:137</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__host__bridge_html"><div class="ttname"><a href="classL4vbus_1_1Pci__host__bridge.html">L4vbus::Pci_host_bridge</a></div><div class="ttdoc">A Pci host bridge.</div><div class="ttdef"><b>Definition</b> <a href="#l00025">vbus_pci:26</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__host__bridge_html_a4441432f00e007ee3a738866238938f0"><div class="ttname"><a href="classL4vbus_1_1Pci__host__bridge.html#a4441432f00e007ee3a738866238938f0">L4vbus::Pci_host_bridge::cfg_read</a></div><div class="ttdeci">int cfg_read(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) const</div><div class="ttdoc">Read from the vPCI configuration space using the PCI root bridge.</div><div class="ttdef"><b>Definition</b> <a href="#l00039">vbus_pci:39</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__host__bridge_html_a4f405f52b078609d885e5331922447f1"><div class="ttname"><a href="classL4vbus_1_1Pci__host__bridge.html#a4f405f52b078609d885e5331922447f1">L4vbus::Pci_host_bridge::irq_enable</a></div><div class="ttdeci">int irq_enable(l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity) const</div><div class="ttdoc">Enable PCI interrupt for a specific device using the PCI root bridge.</div><div class="ttdef"><b>Definition</b> <a href="#l00079">vbus_pci:79</a></div></div>
<div class="ttc" id="aclassL4vbus_1_1Pci__host__bridge_html_ad316f6aeb09ecd36bc7aafa988dd272e"><div class="ttname"><a href="classL4vbus_1_1Pci__host__bridge.html#ad316f6aeb09ecd36bc7aafa988dd272e">L4vbus::Pci_host_bridge::cfg_write</a></div><div class="ttdeci">int cfg_write(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) const</div><div class="ttdoc">Write to the vPCI configuration space using the PCI root bridge.</div><div class="ttdef"><b>Definition</b> <a href="#l00058">vbus_pci:58</a></div></div>
<div class="ttc" id="agroup__l4__basic__types_html_gac1d09f3e382e711b776931f10e6e1e5a"><div class="ttname"><a href="group__l4__basic__types.html#gac1d09f3e382e711b776931f10e6e1e5a">l4_uint32_t</a></div><div class="ttdeci">unsigned int l4_uint32_t</div><div class="ttdoc">Unsigned 32bit value.</div><div class="ttdef"><b>Definition</b> <a href="l4_2sys_2l4int_8h_source.html#l00029">l4int.h:29</a></div></div>
<div class="ttc" id="agroup__l4vbus__pci__module_html_ga25822b176d2142cac40239f3db9ed7f0"><div class="ttname"><a href="group__l4vbus__pci__module.html#ga25822b176d2142cac40239f3db9ed7f0">l4vbus_pci_cfg_read</a></div><div class="ttdeci">L4_BEGIN_DECLS int l4vbus_pci_cfg_read(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)</div><div class="ttdoc">Read from the vPCI configuration space using the PCI root bridge.</div></div>
<div class="ttc" id="agroup__l4vbus__pci__module_html_ga5d4daafe0f275a28a5ba1941cfdfa837"><div class="ttname"><a href="group__l4vbus__pci__module.html#ga5d4daafe0f275a28a5ba1941cfdfa837">l4vbus_pci_cfg_write</a></div><div class="ttdeci">int l4vbus_pci_cfg_write(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)</div><div class="ttdoc">Write to the vPCI configuration space using the PCI root bridge.</div></div>
<div class="ttc" id="agroup__l4vbus__pci__module_html_ga71117c2627ed84dc404d6fc4582b9ec5"><div class="ttname"><a href="group__l4vbus__pci__module.html#ga71117c2627ed84dc404d6fc4582b9ec5">l4vbus_pcidev_irq_enable</a></div><div class="ttdeci">int l4vbus_pcidev_irq_enable(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, unsigned char *trigger, unsigned char *polarity)</div><div class="ttdoc">Enable the device&#39;s PCI interrupt.</div></div>
<div class="ttc" id="agroup__l4vbus__pci__module_html_gad35bdd82e72df73ba00badf6cfe7cf6c"><div class="ttname"><a href="group__l4vbus__pci__module.html#gad35bdd82e72df73ba00badf6cfe7cf6c">l4vbus_pci_irq_enable</a></div><div class="ttdeci">int l4vbus_pci_irq_enable(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity)</div><div class="ttdoc">Enable PCI interrupt for a specific device using the PCI root bridge.</div></div>
<div class="ttc" id="agroup__l4vbus__pci__module_html_gaed48c2e41fa4fc7cefeaca2b15b34aa5"><div class="ttname"><a href="group__l4vbus__pci__module.html#gaed48c2e41fa4fc7cefeaca2b15b34aa5">l4vbus_pcidev_cfg_write</a></div><div class="ttdeci">int l4vbus_pcidev_cfg_write(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)</div><div class="ttdoc">Write to the device&#39;s vPCI configuration space.</div></div>
<div class="ttc" id="agroup__l4vbus__pci__module_html_gaf6db088ef60ca6f09dbfb50a4b34ae32"><div class="ttname"><a href="group__l4vbus__pci__module.html#gaf6db088ef60ca6f09dbfb50a4b34ae32">l4vbus_pcidev_cfg_read</a></div><div class="ttdeci">int l4vbus_pcidev_cfg_read(l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)</div><div class="ttdoc">Read from the device&#39;s vPCI configuration space.</div></div>
<div class="ttc" id="anamespaceL4vbus_html"><div class="ttname"><a href="namespaceL4vbus.html">L4vbus</a></div><div class="ttdoc">C++ interface of the Vbus API.</div><div class="ttdef"><b>Definition</b> <a href="vbus_source.html#l00040">vbus:40</a></div></div>
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