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140 lines
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<div id="projectname">L4Re Operating System Framework
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<div id="projectbrief">Interface and Usage Documentation</div>
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<div class="contents">
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<div class="textblock">Here is a list of all documented functions with links to the struct/union documentation for each field:</div>
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<h3 class="doxsection"><a id="index_o" name="index_o"></a>- o -</h3><ul>
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<li>obj() : <a class="el" href="classL4_1_1Ipc_1_1Rcv__fpage.html#a46b01a76914d46f22795b3eb6e93ce1e">L4::Ipc::Rcv_fpage</a>, <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#a7c8347a9f88bde11cc4acc52a63f17d8">L4::Ipc::Snd_fpage</a></li>
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<li>obj_cap() : <a class="el" href="structL4_1_1Epiface.html#a0d454b9446bdf9e317b09574a5155fe0">L4::Epiface</a>, <a class="el" href="structL4_1_1Epiface__t0.html#a3557bb44ec6dd6d378083748e94f27f5">L4::Epiface_t0< RPC_IFACE, BASE ></a>, <a class="el" href="structL4_1_1Irqep__t.html#aa896c36376f94c96d766761997163d10">L4::Irqep_t< Derived, BASE, bool ></a></li>
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<li>Object_registry() : <a class="el" href="classL4Re_1_1Util_1_1Object__registry.html#aee2f4a6d4d4239174b94a1f4f6412603">L4Re::Util::Object_registry</a></li>
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<li>offset() : <a class="el" href="structl4__sched__cpu__set__t.html#a23f6f4962b55dc6b0d581c6c5ad4d8a2">l4_sched_cpu_set_t</a></li>
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<li>op_create() : <a class="el" href="classSwitch__factory.html#a15ef952a526c1ce7633b241d674f9e00">Switch_factory</a></li>
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<li>op_get_buffer() : <a class="el" href="classL4Re_1_1Util_1_1Event__svr.html#a33d9f393da33d16a85528ed5a4312e47">L4Re::Util::Event_svr< SVR ></a></li>
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<li>operator bool() : <a class="el" href="classL4_1_1Ipc_1_1Varg__list__ref_1_1Iterator.html#a35b403543cfb66545a5f3465bb2b1251">L4::Ipc::Varg_list_ref::Iterator</a>, <a class="el" href="classL4_1_1Types_1_1Flags.html#adc05cdb1065d45ca4411c6fe7ba9bb51">L4::Types::Flags< BITS_ENUM, UNDERLYING ></a>, <a class="el" href="structL4_1_1Types_1_1Flags__ops__t.html#a1c387a4e7cbf111c57c5ff5849c45877">L4::Types::Flags_ops_t< DT ></a>, <a class="el" href="classL4virtio_1_1Svr_1_1Virtqueue_1_1Head__desc.html#ac153517ddfa3de25765955ead0d6bf74">L4virtio::Svr::Virtqueue::Head_desc</a></li>
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<li>operator E*() : <a class="el" href="classcxx_1_1List_1_1Iter.html#a326737ce41042de0ee5115aec0063e95">cxx::List< D, Alloc >::Iter</a></li>
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<li>operator Item_type const *() : <a class="el" href="classcxx_1_1Bits_1_1Base__avl__set_1_1Node.html#a92a711db29517be4ee5bf6d49b364dbf">cxx::Bits::Base_avl_set< ITEM_TYPE, COMPARE, ALLOC, GET_KEY >::Node</a></li>
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<li>operator l4_msgtag_t() : <a class="el" href="classL4_1_1Factory_1_1S.html#af01d7ba40ace8862c0b670e1fb705810">L4::Factory::S</a></li>
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<li>operator value_type() : <a class="el" href="classL4drivers_1_1Ro__register__tmpl.html#af47629d54bba5b9c6e87795b1accdf18">L4drivers::Ro_register_tmpl< BITS, BLOCK ></a></li>
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<li>operator!() : <a class="el" href="structcxx_1_1Bits_1_1Direction.html#aa091b42096054e33c7d3b44e4447cfed">cxx::Bits::Direction</a>, <a class="el" href="classL4_1_1Types_1_1Flags.html#ae492210926fa1c1134a3f14504d8b431">L4::Types::Flags< BITS_ENUM, UNDERLYING ></a></li>
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<li>operator!=() : <a class="el" href="structcxx_1_1Bits_1_1Direction.html#a45ae9d993cc41bcd102cb61ab71a3dc7">cxx::Bits::Direction</a>, <a class="el" href="classcxx_1_1String.html#aad2a0d5e7ed3dc296934591850092edc">cxx::String</a>, <a class="el" href="classL4_1_1Cap__base.html#a67660c0a25460daa0cdde8352f367e49">L4::Cap_base</a>, <a class="el" href="classL4vbus_1_1Device.html#a9f5bce4e7220814a19abb0cdea611330">L4vbus::Device</a></li>
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<li>operator&=() : <a class="el" href="classL4_1_1Types_1_1Flags.html#af6c39c6b541dc4fe27013d8f363c72e0">L4::Types::Flags< BITS_ENUM, UNDERLYING ></a>, <a class="el" href="structL4_1_1Types_1_1Flags__ops__t.html#ab6f9a58fbc35846663de69bae2b27d35">L4::Types::Flags_ops_t< DT ></a></li>
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<li>operator()() : <a class="el" href="classcxx_1_1Pair__first__compare.html#a37252c0aa0712a5f4e4a78ba6ba0f966">cxx::Pair_first_compare< Cmp, Typ ></a>, <a class="el" href="structL4_1_1Ipc__svr_1_1Dbg__dispatch.html#a028fa852dd0193da29e471db7c6ad10f">L4::Ipc_svr::Dbg_dispatch< R, Exc, Printer ></a>, <a class="el" href="structL4_1_1Ipc__svr_1_1Direct__dispatch.html#a9d9b344853809077e228a722064aefed">L4::Ipc_svr::Direct_dispatch< R ></a>, <a class="el" href="structL4_1_1Ipc__svr_1_1Direct__dispatch_3_01R_01_5_01_4.html#a0f2323e68728f2065464415bc542aafd">L4::Ipc_svr::Direct_dispatch< R * ></a>, <a class="el" href="structL4_1_1Ipc__svr_1_1Exc__dispatch.html#a551ccfbe372009fa7319689dedfc4ded">L4::Ipc_svr::Exc_dispatch< R, Exc ></a></li>
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<li>operator*() : <a class="el" href="classcxx_1_1Bits_1_1Base__avl__set_1_1Node.html#af5bcdbee4b0975c9e814165ef85b903d">cxx::Bits::Base_avl_set< ITEM_TYPE, COMPARE, ALLOC, GET_KEY >::Node</a>, <a class="el" href="classL4_1_1Ipc_1_1Varg__list__ref_1_1Iterator.html#ad13050ce85c5216352433a25e72b473f">L4::Ipc::Varg_list_ref::Iterator</a>, <a class="el" href="classL4Re_1_1Rm_1_1Unique__region.html#a6d8f7c9a6114881dc3d2317ef2071d9c">L4Re::Rm::Unique_region< T ></a>, <a class="el" href="classRm_1_1Unique__region.html#a6d8f7c9a6114881dc3d2317ef2071d9c">Rm::Unique_region< T ></a></li>
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<li>operator++() : <a class="el" href="classL4_1_1Ipc_1_1Varg__list__ref_1_1Iterator.html#abaa41faf7abd0511f2da2a19166cf840">L4::Ipc::Varg_list_ref::Iterator</a></li>
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<li>operator->() : <a class="el" href="classcxx_1_1Bits_1_1Base__avl__set_1_1Node.html#a30ba23295e9dfb1f2978697a9eacfc31">cxx::Bits::Base_avl_set< ITEM_TYPE, COMPARE, ALLOC, GET_KEY >::Node</a>, <a class="el" href="classL4_1_1Cap.html#a759c3901eb85ab9beda2082b45d98566">L4::Cap< T ></a>, <a class="el" href="structL4_1_1Ipc_1_1Opt.html#acdc560b4893f3c5948d7587774016bf1">L4::Ipc::Opt< T ></a>, <a class="el" href="classL4_1_1Smart__cap.html#a1455f2b349ad7252ca182886332ebbee">L4::Smart_cap< T, SMART ></a>, <a class="el" href="classL4Re_1_1Rm_1_1Unique__region.html#a30f3114bf3eba659b0c8bf12a61434ec">L4Re::Rm::Unique_region< T ></a>, <a class="el" href="classRm_1_1Unique__region.html#a30f3114bf3eba659b0c8bf12a61434ec">Rm::Unique_region< T ></a></li>
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<li>operator<<() : <a class="el" href="classL4_1_1Factory_1_1S.html#a867317b78ac79b473c6b8cdb5cac48ef">L4::Factory::S</a></li>
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<li>operator=() : <a class="el" href="structL4_1_1Ipc_1_1Opt.html#ae9aea0e320f4f246a1eff4e619b9a3a6">L4::Ipc::Opt< T ></a>, <a class="el" href="classL4_1_1Lock__guard.html#a86f052391b9f2b9917b915b84a85bbbc">L4::Lock_guard</a>, <a class="el" href="classL4drivers_1_1Register__tmpl.html#ae2b1b861a8912ed8a7f0fb7b5c747d69">L4drivers::Register_tmpl< BITS, BLOCK ></a>, <a class="el" href="classL4Re_1_1Rm_1_1Unique__region.html#a2dd9ea7d4a242dff0651b173c428c281">L4Re::Rm::Unique_region< T ></a>, <a class="el" href="classRm_1_1Unique__region.html#a2dd9ea7d4a242dff0651b173c428c281">Rm::Unique_region< T ></a></li>
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<li>operator==() : <a class="el" href="structcxx_1_1Bits_1_1Direction.html#a7944981ed13967fc7e2e701abfd501fb">cxx::Bits::Direction</a>, <a class="el" href="classcxx_1_1String.html#a330429e4e2b79ce768f6894d698c0cc7">cxx::String</a>, <a class="el" href="classL4_1_1Cap__base.html#aaacc5520eb3de110f1365d849af3c1a2">L4::Cap_base</a>, <a class="el" href="classL4Re_1_1Video_1_1Color__component.html#a1a56065481a4fdef631d4c1ffe9bc022">L4Re::Video::Color_component</a>, <a class="el" href="classL4Re_1_1Video_1_1Pixel__info.html#a4569f55d3014dba37636061937ce99c1">L4Re::Video::Pixel_info</a>, <a class="el" href="classL4vbus_1_1Device.html#a64fd18112b94f67568dfd48afda5db22">L4vbus::Device</a></li>
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<li>operator[]() : <a class="el" href="classcxx_1_1Avl__map.html#aea7acedd7d4a26289da9f9c01d434145">cxx::Avl_map< KEY_TYPE, DATA_TYPE, COMPARE, ALLOC ></a>, <a class="el" href="classcxx_1_1Bitmap__base.html#aab1d18dba8fdcf06a5a9d773fc63410b">cxx::Bitmap_base</a>, <a class="el" href="classcxx_1_1List.html#acb8f32553f2c60b00a09ce6249a58af3">cxx::List< D, Alloc ></a>, <a class="el" href="classcxx_1_1String.html#ae3c9d475d73c844d83d4ee78871470bf">cxx::String</a>, <a class="el" href="classL4drivers_1_1Register__block.html#a0f7cb834aa20e684b20d5d671438adb6">L4drivers::Register_block< MAX_BITS, BLOCK ></a>, <a class="el" href="classL4drivers_1_1Ro__register__block.html#a6780072f77c2d104698c8c57f6549e9e">L4drivers::Ro_register_block< MAX_BITS, BLOCK ></a>, <a class="el" href="classL4Re_1_1Util_1_1Bitmap__base.html#aab1d18dba8fdcf06a5a9d773fc63410b">L4Re::Util::Bitmap_base</a></li>
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<li>operator|() : <a class="el" href="classL4_1_1Type__info_1_1Demand.html#af012ede0c0b8f60b8be1846e68d66400">L4::Type_info::Demand</a></li>
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<li>operator|=() : <a class="el" href="classL4_1_1Types_1_1Flags.html#a6841571f376dca3c87f13d28f2537117">L4::Types::Flags< BITS_ENUM, UNDERLYING ></a>, <a class="el" href="structL4_1_1Types_1_1Flags__ops__t.html#a2b96de14d1c18ff990767ba92033418b">L4::Types::Flags_ops_t< DT ></a></li>
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<li>operator~() : <a class="el" href="classL4_1_1Types_1_1Flags.html#a33c40a0e174ce6828cfd9093bd2a77f1">L4::Types::Flags< BITS_ENUM, UNDERLYING ></a>, <a class="el" href="structL4_1_1Types_1_1Flags__ops__t.html#a60753f9989ab9dbbd2d0f913bbd9546d">L4::Types::Flags_ops_t< DT ></a></li>
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<li>Opt() : <a class="el" href="structL4_1_1Ipc_1_1Opt.html#a918f8db40f5d84510c57af4feea7dfe3">L4::Ipc::Opt< T ></a></li>
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<li>order() : <a class="el" href="classL4_1_1Ipc_1_1Snd__fpage.html#a817de8b27c880ca4c1b4788df8ce079c">L4::Ipc::Snd_fpage</a></li>
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<li>Ostream() : <a class="el" href="classL4_1_1Ipc_1_1Ostream.html#a0399a63243e4445e84e3ec35bfd280bc">L4::Ipc::Ostream</a></li>
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<li>Out_of_memory() : <a class="el" href="classL4_1_1Out__of__memory.html#a4f749bee6d834617c30eb7accac71037">L4::Out_of_memory</a></li>
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