30 lines
1.4 KiB
Makefile
30 lines
1.4 KiB
Makefile
# vim:se ft=make:
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CROSS_COMPILE_riscv = riscv64-linux-gnu-
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ASFLAGS_riscv = -Wa,--noexecstack
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ELF_BINARY_TYPE_riscv = elf$(BITS)
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LD_EMULATION_CHOICE_riscv = $(ELF_BINARY_TYPE_riscv)lriscv
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OFORMAT_riscv = $(ELF_BINARY_TYPE_riscv)-littleriscv
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BFD_ARCH_riscv = littleriscv
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L4_KIP_ADDR_riscv ?= 0x7fff0000
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L4_STACK_ADDR_riscv ?= 0x70000000
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# Since version 2.38, binutils by default targets the ISA specification version
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# 20191213, where the CSR instructions and the FENCE.I instruction have been
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# moved from the I extension into separate extensions: Zicsr and Zifencei
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RISCV_ZICSR_ZIFENCEI_riscv_f = $(if $(call checkcc,-march=$(CPU)_zicsr_zifencei \
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-mabi=$(CPU_ABI) \
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-mcmodel=medany),_zicsr_zifencei)
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CARCHFLAGS_riscv += -march=$(CPU)$(RISCV_ZICSR_ZIFENCEI_riscv) \
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-mabi=$(CPU_ABI) -mcmodel=medany
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LDFLAGS_riscv += -z noexecstack
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SYSTEMS_ABI += riscv-l4f
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SYSTEMS_PLAIN += riscv-plain
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# As of now (gcc-12) there is no option to prevent the compiler from generating
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# FPU instructions. So we just have to assume that the compiler does not do it,
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# until it introduces a flag able to prevent it.
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GCCNOFPU_riscv_f =
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QEMU_ARCH_MAP_riscv = qemu-system-riscv$(BITS)
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