fpu.h

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// AUTOMATICALLY GENERATED -- DO NOT EDIT!         -*- c++ -*-

#ifndef fpu_h
#define fpu_h

#include "initcalls.h"

//
// INTERFACE definition follows 
//


class slab_cache_anon;
class Context;
class Fpu_state;
/*
 * Fiasco
 * Floating point unit code
 */



class Fpu 
{
public:

  static Context *owner();
  static void set_owner(Context *owner);
  static bool is_owner(Context *owner);

  // all the following methods are arch dependent
  static void init() FIASCO_INIT;
  static unsigned const state_size();
  static unsigned const state_align();
  static void init_state( Fpu_state *);
  static void restore_state( Fpu_state * );
  static void save_state( Fpu_state * );
  static void disable();
  static void enable();

private:

  static Context *_owner;
private:

private:
  struct fpu_regs       // saved FPU registers
  {
    long    cwd;
    long    swd;
    long    twd;
    long    fip;
    long    fcs;
    long    foo;
    long    fos;
    long    st_space[20];   /* 8*10 bytes for each FP-reg = 80 bytes */
  };

  struct sse_regs 
  {
    unsigned short  cwd;
    unsigned short  swd;
    unsigned short  twd;
    unsigned short  fop;
    long    fip;
    long    fcs;
    long    foo;
    long    fos;
    long    mxcsr;
    long    reserved;
    long    st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
    long    xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
    long    padding[56];
  };
};

//
// IMPLEMENTATION includes follow (for use by inline functions)
//


#include <cstring>
#include "fpu_state.h"

#include <cassert>
#include "cpu.h"
#include "regdefs.h"

//
// IMPLEMENTATION of inline functions (and needed classes)
//




inline Context * Fpu::owner()
{
  return _owner;
}



inline void Fpu::set_owner(Context *owner)
{
  _owner = owner;
}



inline bool Fpu::is_owner(Context *owner)
{
  return _owner == owner;
}


/*
 * Initialize FPU or SSE state
 * We don't use finit, because it is slow. Initializing the context in
 * memory and fetching it via restore_state is supposedly faster
 */

inline void
Fpu::init_state(Fpu_state *s)
{
  if ((Cpu::features() & FEAT_FXSR)) {

    sse_regs *sse = reinterpret_cast<sse_regs *>(s->state_buffer());

    memset (sse, 0, sizeof (*sse));
    sse->cwd = 0x37f;

    if ((Cpu::features() & FEAT_SSE))
      sse->mxcsr = 0x1f80;

  } else {

    fpu_regs *fpu = reinterpret_cast<fpu_regs *>(s->state_buffer());

    memset (fpu, 0, sizeof (*fpu));
    fpu->cwd = 0xffff037f;
    fpu->swd = 0xffff0000;
    fpu->twd = 0xffffffff;
    fpu->fos = 0xffff0000;
  }
}


inline unsigned const
Fpu::state_size()
{
  return (Cpu::features() & FEAT_FXSR) ? sizeof (sse_regs) :
                                         sizeof (fpu_regs);
}


inline unsigned const
Fpu::state_align()
{
  return (Cpu::features() & FEAT_FXSR) ? 16 : 4;
}

   
/*
 * Save FPU or SSE state
 */

inline void
Fpu::save_state(Fpu_state *s)
{
  assert (s->state_buffer());

  // Both fxsave and fnsave are non-waiting instructions and thus
  // cannot cause exception #16 for pending FPU exceptions.

  if ((Cpu::features() & FEAT_FXSR))
    asm volatile ("fxsave (%0)" : : "r" (s->state_buffer()) : "memory");
  else
    asm volatile ("fnsave (%0)" : : "r" (s->state_buffer()) : "memory");
}  


/*
 * Restore a saved FPU or SSE state
 */

inline void
Fpu::restore_state(Fpu_state *s)
{
  assert (s->state_buffer());

  // Only fxrstor is a non-waiting instruction and thus
  // cannot cause exception #16 for pending FPU exceptions.

  if ((Cpu::features() & FEAT_FXSR))
    asm volatile ("fxrstor (%0)" : : "r" (s->state_buffer()));

  else {

    // frstor is a waiting instruction and we must make sure no
    // FPU exceptions are pending here. We distinguish two cases:
    // 1) If we had a previous FPU owner, we called save_state before and
    //    invoked fnsave which re-initialized the FPU and cleared exceptions
    // 2) Otherwise we call fnclex instead to clear exceptions.

    if (!Fpu::owner())
      asm volatile ("fnclex");

    asm volatile ("frstor (%0)" : : "r" (s->state_buffer()));
  }
}


/*
 * Mark the FPU busy. The next attempt to use it will yield a trap.
 */

inline void
Fpu::disable()
{
  Cpu::set_cr0 (Cpu::get_cr0() | CR0_TS);
}


/*
 * Mark the FPU no longer busy. Subsequent FPU access won't trap.
 */

inline void
Fpu::enable()
{ 
  asm volatile ("clts");
}

#endif // fpu_h

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