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Cpu Class Reference

#include <cpu.h>

List of all members.

Public Types

enum  Vendor {
  Vendor_unknown = 0, Vendor_intel, Vendor_amd, Vendor_cyrix,
  Vendor_via, Vendor_umc, Vendor_nexgen, Vendor_rise,
  Vendor_transmeta, Vendor_sis, Vensor_nsc
}
enum  CacheTLB {
  Cache_unknown = 0, Cache_l1_data, Cache_l1_inst, Cache_l1_trace,
  Cache_l2, Cache_l3, Tlb_data_4k, Tlb_inst_4k,
  Tlb_data_4M, Tlb_inst_4M, Tlb_data_4k_4M, Tlb_inst_4k_4M
}
enum  { Ldt_entry_size = 8 }
enum  Local_features { Lf_rdpmc = 0x00000001, Lf_rdpmc32 = 0x00000002 }
enum  Lbr { LBR_UNINITIALIZED = 0, LBR_NONE, LBR_P6, LBR_P4 }

Static Public Member Functions

static void init ()
static Unsigned64 time_us ()
static int can_wrmsr ()
static char const * vendor_str ()
static char const * model_str ()
static Cpu::Vendor const vendor ()
static unsigned int const family ()
static unsigned int const model ()
static unsigned int const stepping ()
static unsigned int const type ()
static Unsigned64 frequency ()
static unsigned int const brand ()
static unsigned int const features ()
static unsigned int const ext_features ()
static unsigned int const ext_amd_features ()
static unsigned int const local_features ()
static bool have_superpages ()
static bool have_tsc ()
static bool have_sysenter ()
static FIASCO_INIT void identify ()
 Identify the CPU features.
static Unsigned32 muldiv (Unsigned32 val, Unsigned32 mul, Unsigned32 div)
static Unsigned64 ns_to_tsc (Unsigned64 ns)
static Unsigned64 tsc_to_ns (Unsigned64 tsc)
static Unsigned64 tsc_to_us (Unsigned64 tsc)
static void tsc_to_s_and_ns (Unsigned64 tsc, Unsigned32 *s, Unsigned32 *ns)
static void busy_wait_ns (Unsigned64 ns)
static Unsigned64 rdtsc (void)
static Unsigned32 get_scaler_tsc_to_ns ()
static Unsigned32 get_scaler_tsc_to_us ()
static Unsigned32 get_scaler_ns_to_tsc ()
static Unsigned32 get_flags ()
static void set_flags (Unsigned32 efl)
static Unsigned32 get_es ()
static Unsigned32 get_ss ()
static Unsigned32 get_fs ()
static Unsigned32 get_gs ()
static void set_ds (Unsigned32 val)
static void set_es (Unsigned32 val)
static void set_fs (Unsigned32 val)
static void set_gs (Unsigned32 val)
static void show_cache_tlb_info (const char *indent)
static void memcpy_bytes (void *dst, void const *src, size_t n)
static void memcpy_mwords (void *dst, void const *src, size_t n)
static void memcpy_bytes_fs (void *dst, void const *src, size_t n)
static void memcpy_mwords_fs (void *dst, void const *src, size_t n)
static void set_cr0 (Unsigned32 val)
static void set_pdbr (Address addr)
static void set_cr4 (Unsigned32 val)
static void set_ldt (Unsigned16 val)
static void set_cs ()
static void set_ss (Unsigned32 val)
static void set_tr (Unsigned16 val)
static Mword get_cr0 ()
static Address get_pdbr ()
static Mword get_cr4 ()
static Unsigned16 get_ldt ()
static Unsigned16 get_tr ()
static Unsigned64 rdmsr (Unsigned32 reg)
static Unsigned64 rdpmc (Unsigned32 idx, Unsigned32)
static void wrmsr (Unsigned32 low, Unsigned32 high, Unsigned32 reg)
static void wrmsr (Unsigned64 msr, Unsigned32 reg)
static void enable_rdpmc ()
static Cpu::Lbr const lbr_type ()
static void enable_lbr (void)
static void disable_lbr (void)
static FIASCO_INIT void init_sysenter (Address kernel_esp)
static void set_sysenter (void(*func)(void))
static void get_sysenter (void(**func)(void))
static FIASCO_INIT void init_gdt (Address gdt_mem, Address user_max)
static FIASCO_INIT void init_tss (Address tss_mem, size_t tss_size)
static FIASCO_INIT void init_tss_dbf (Address tss_dbf_mem, Address kdir)
static void set_gdt ()
static void set_tss ()
static Gdtget_gdt ()
static Tssget_tss ()
static void enable_ldt (Address addr, int size)

Private Types

typedef void( Sysenter )(void)

Static Private Member Functions

static Lbr lbr asm ("CPU_LBR")
static Sysenter *current_sysenter asm ("CURRENT_SYSENTER")
static Gdt *gdt asm ("CPU_GDT")
static Tss *tss asm ("CPU_TSS")
static FIASCO_INIT void cpuid (Unsigned32 const mode, Unsigned32 *const eax, Unsigned32 *const ebx, Unsigned32 *const ecx, Unsigned32 *const edx)
static FIASCO_INIT void cache_tlb_intel ()
static FIASCO_INIT void cache_tlb_l1 ()
static FIASCO_INIT void cache_tlb_l2 (Cpu::Vendor vendor)
static FIASCO_INIT void set_model_str (Cpu::Vendor const vendor, unsigned const version, Unsigned16 const l2_cache)
static FIASCO_INIT void calibrate_tsc ()

Private Attributes

Cpu::Vendor_table packed

Static Private Attributes

static Unsigned64 _frequency
static Unsigned32 _version
static Unsigned32 _brand
static Unsigned32 _features
static Unsigned32 _ext_features
static Unsigned32 _ext_amd_features
static Unsigned32 _local_features
static Unsigned16 _inst_tlb_4k_entries
static Unsigned16 _data_tlb_4k_entries
static Unsigned16 _inst_tlb_4m_entries
static Unsigned16 _data_tlb_4m_entries
static Unsigned16 _inst_tlb_4k_4m_entries
static Unsigned16 _data_tlb_4k_4m_entries
static Unsigned16 _l2_inst_tlb_4k_entries
static Unsigned16 _l2_data_tlb_4k_entries
static Unsigned16 _l2_inst_tlb_4m_entries
static Unsigned16 _l2_data_tlb_4m_entries
static Unsigned16 _l1_trace_cache_size
static Unsigned16 _l1_trace_cache_asso
static Unsigned16 _l1_data_cache_size
static Unsigned16 _l1_data_cache_asso
static Unsigned16 _l1_data_cache_line_size
static Unsigned16 _l1_inst_cache_size
static Unsigned16 _l1_inst_cache_asso
static Unsigned16 _l1_inst_cache_line_size
static Unsigned16 _l2_cache_size
static Unsigned16 _l2_cache_asso
static Unsigned16 _l2_cache_line_size
static Vendor _vendor
static char _model_str [32]
static Vendor_table const intel_table []
static Vendor_table const amd_table []
static Vendor_table const cyrix_table []
static Vendor_table const via_table []
static Vendor_table const umc_table []
static Vendor_table const nexgen_table []
static Vendor_table const rise_table []
static Vendor_table const transmeta_table []
static Vendor_table const sis_table []
static Vendor_table const nsc_table []
static Cache_table const intel_cache_table []
static char *const vendor_ident []
static Vendor_table const
*const 
vendor_table []
static Unsigned32 scaler_tsc_to_ns
static Unsigned32 scaler_tsc_to_us
static Unsigned32 scaler_ns_to_tsc
static Tsstss_dbf

Classes

struct  Cache_table
struct  Vendor_table


Member Typedef Documentation

typedef void( Cpu::Sysenter)(void) [private]
 


Member Enumeration Documentation

anonymous enum
 

Enumeration values:
Ldt_entry_size 

enum Cpu::CacheTLB
 

Enumeration values:
Cache_unknown 
Cache_l1_data 
Cache_l1_inst 
Cache_l1_trace 
Cache_l2 
Cache_l3 
Tlb_data_4k 
Tlb_inst_4k 
Tlb_data_4M 
Tlb_inst_4M 
Tlb_data_4k_4M 
Tlb_inst_4k_4M 

enum Cpu::Lbr
 

Enumeration values:
LBR_UNINITIALIZED 
LBR_NONE 
LBR_P6 
LBR_P4 

enum Cpu::Local_features
 

Enumeration values:
Lf_rdpmc 
Lf_rdpmc32 

enum Cpu::Vendor
 

Enumeration values:
Vendor_unknown 
Vendor_intel 
Vendor_amd 
Vendor_cyrix 
Vendor_via 
Vendor_umc 
Vendor_nexgen 
Vendor_rise 
Vendor_transmeta 
Vendor_sis 
Vensor_nsc 


Member Function Documentation

static Tss* tss Cpu::asm "CPU_TSS"   )  [static, private]
 

static Gdt* gdt Cpu::asm "CPU_GDT"   )  [static, private]
 

static Sysenter* current_sysenter Cpu::asm "CURRENT_SYSENTER"   )  [static, private]
 

static Lbr lbr Cpu::asm "CPU_LBR"   )  [static, private]
 

unsigned int const Cpu::brand  )  [inline, static]
 

void Cpu::busy_wait_ns Unsigned64  ns  )  [inline, static]
 

FIASCO_INIT void Cpu::cache_tlb_intel  )  [static, private]
 

FIASCO_INIT void Cpu::cache_tlb_l1  )  [static, private]
 

FIASCO_INIT void Cpu::cache_tlb_l2 Cpu::Vendor  vendor  )  [static, private]
 

FIASCO_INIT void Cpu::calibrate_tsc  )  [static, private]
 

int Cpu::can_wrmsr  )  [inline, static]
 

FIASCO_INIT void Cpu::cpuid Unsigned32 const   mode,
Unsigned32 *const   eax,
Unsigned32 *const   ebx,
Unsigned32 *const   ecx,
Unsigned32 *const   edx
[inline, static, private]
 

void Cpu::disable_lbr void   )  [inline, static]
 

void Cpu::enable_lbr void   )  [inline, static]
 

void Cpu::enable_ldt Address  addr,
int  size
[inline, static]
 

void Cpu::enable_rdpmc  )  [inline, static]
 

unsigned int const Cpu::ext_amd_features  )  [inline, static]
 

unsigned int const Cpu::ext_features  )  [inline, static]
 

unsigned int const Cpu::family  )  [inline, static]
 

unsigned int const Cpu::features  )  [inline, static]
 

Unsigned64 Cpu::frequency  )  [inline, static]
 

Mword Cpu::get_cr0  )  [inline, static]
 

Mword Cpu::get_cr4  )  [inline, static]
 

Unsigned32 Cpu::get_es  )  [inline, static]
 

Unsigned32 Cpu::get_flags  )  [inline, static]
 

Unsigned32 Cpu::get_fs  )  [inline, static]
 

Gdt * Cpu::get_gdt  )  [inline, static]
 

Unsigned32 Cpu::get_gs  )  [inline, static]
 

Unsigned16 Cpu::get_ldt  )  [inline, static]
 

Address Cpu::get_pdbr  )  [inline, static]
 

Unsigned32 Cpu::get_scaler_ns_to_tsc  )  [inline, static]
 

Unsigned32 Cpu::get_scaler_tsc_to_ns  )  [inline, static]
 

Unsigned32 Cpu::get_scaler_tsc_to_us  )  [inline, static]
 

Unsigned32 Cpu::get_ss  )  [inline, static]
 

void Cpu::get_sysenter void(**)(void)  func  )  [static]
 

Unsigned16 Cpu::get_tr  )  [inline, static]
 

Tss * Cpu::get_tss  )  [inline, static]
 

bool Cpu::have_superpages  )  [inline, static]
 

bool Cpu::have_sysenter  )  [inline, static]
 

bool Cpu::have_tsc  )  [inline, static]
 

FIASCO_INIT void Cpu::identify  )  [static]
 

Identify the CPU features.

Attention: This function may be called more than once. The reason is that enabling a Local APIC that was previously disabled by the BIOS may change the processor features. Therefore, this function has to be called again after the Local APIC was enabled.

FIASCO_INIT void Cpu::init  )  [static]
 

FIASCO_INIT void Cpu::init_gdt Address  gdt_mem,
Address  user_max
[static]
 

FIASCO_INIT void Cpu::init_sysenter Address  kernel_esp  )  [static]
 

FIASCO_INIT void Cpu::init_tss Address  tss_mem,
size_t  tss_size
[static]
 

FIASCO_INIT void Cpu::init_tss_dbf Address  tss_dbf_mem,
Address  kdir
[static]
 

Cpu::Lbr const Cpu::lbr_type  )  [static]
 

unsigned int const Cpu::local_features  )  [inline, static]
 

void Cpu::memcpy_bytes void *  dst,
void const *  src,
size_t  n
[inline, static]
 

void Cpu::memcpy_bytes_fs void *  dst,
void const *  src,
size_t  n
[inline, static]
 

void Cpu::memcpy_mwords void *  dst,
void const *  src,
size_t  n
[inline, static]
 

void Cpu::memcpy_mwords_fs void *  dst,
void const *  src,
size_t  n
[inline, static]
 

unsigned int const Cpu::model  )  [inline, static]
 

char const * Cpu::model_str  )  [inline, static]
 

Unsigned32 Cpu::muldiv Unsigned32  val,
Unsigned32  mul,
Unsigned32  div
[inline, static]
 

Unsigned64 Cpu::ns_to_tsc Unsigned64  ns  )  [inline, static]
 

Unsigned64 Cpu::rdmsr Unsigned32  reg  )  [inline, static]
 

Unsigned64 Cpu::rdpmc Unsigned32  idx,
Unsigned32 
[inline, static]
 

Unsigned64 Cpu::rdtsc void   )  [inline, static]
 

void Cpu::set_cr0 Unsigned32  val  )  [inline, static]
 

void Cpu::set_cr4 Unsigned32  val  )  [inline, static]
 

void Cpu::set_cs  )  [inline, static]
 

void Cpu::set_ds Unsigned32  val  )  [inline, static]
 

void Cpu::set_es Unsigned32  val  )  [inline, static]
 

void Cpu::set_flags Unsigned32  efl  )  [inline, static]
 

void Cpu::set_fs Unsigned32  val  )  [inline, static]
 

void Cpu::set_gdt  )  [inline, static]
 

void Cpu::set_gs Unsigned32  val  )  [inline, static]
 

void Cpu::set_ldt Unsigned16  val  )  [inline, static]
 

FIASCO_INIT void Cpu::set_model_str Cpu::Vendor const   vendor,
unsigned const   version,
Unsigned16 const   l2_cache
[static, private]
 

void Cpu::set_pdbr Address  addr  )  [inline, static]
 

void Cpu::set_ss Unsigned32  val  )  [inline, static]
 

void Cpu::set_sysenter void(*)(void)  func  )  [static]
 

void Cpu::set_tr Unsigned16  val  )  [inline, static]
 

void Cpu::set_tss  )  [inline, static]
 

void Cpu::show_cache_tlb_info const char *  indent  )  [static]
 

unsigned int const Cpu::stepping  )  [inline, static]
 

Unsigned64 Cpu::time_us  )  [inline, static]
 

Unsigned64 Cpu::tsc_to_ns Unsigned64  tsc  )  [inline, static]
 

void Cpu::tsc_to_s_and_ns Unsigned64  tsc,
Unsigned32 *  s,
Unsigned32 *  ns
[inline, static]
 

Unsigned64 Cpu::tsc_to_us Unsigned64  tsc  )  [inline, static]
 

unsigned int const Cpu::type  )  [inline, static]
 

Cpu::Vendor const Cpu::vendor  )  [inline, static]
 

char const * Cpu::vendor_str  )  [inline, static]
 

void Cpu::wrmsr Unsigned64  msr,
Unsigned32  reg
[inline, static]
 

void Cpu::wrmsr Unsigned32  low,
Unsigned32  high,
Unsigned32  reg
[inline, static]
 


Member Data Documentation

Unsigned32 Cpu::_brand [static, private]
 

Unsigned16 Cpu::_data_tlb_4k_4m_entries [static, private]
 

Unsigned16 Cpu::_data_tlb_4k_entries [static, private]
 

Unsigned16 Cpu::_data_tlb_4m_entries [static, private]
 

Unsigned32 Cpu::_ext_amd_features [static, private]
 

Unsigned32 Cpu::_ext_features [static, private]
 

Unsigned32 Cpu::_features [static, private]
 

Unsigned64 Cpu::_frequency [static, private]
 

Unsigned16 Cpu::_inst_tlb_4k_4m_entries [static, private]
 

Unsigned16 Cpu::_inst_tlb_4k_entries [static, private]
 

Unsigned16 Cpu::_inst_tlb_4m_entries [static, private]
 

Unsigned16 Cpu::_l1_data_cache_asso [static, private]
 

Unsigned16 Cpu::_l1_data_cache_line_size [static, private]
 

Unsigned16 Cpu::_l1_data_cache_size [static, private]
 

Unsigned16 Cpu::_l1_inst_cache_asso [static, private]
 

Unsigned16 Cpu::_l1_inst_cache_line_size [static, private]
 

Unsigned16 Cpu::_l1_inst_cache_size [static, private]
 

Unsigned16 Cpu::_l1_trace_cache_asso [static, private]
 

Unsigned16 Cpu::_l1_trace_cache_size [static, private]
 

Unsigned16 Cpu::_l2_cache_asso [static, private]
 

Unsigned16 Cpu::_l2_cache_line_size [static, private]
 

Unsigned16 Cpu::_l2_cache_size [static, private]
 

Unsigned16 Cpu::_l2_data_tlb_4k_entries [static, private]
 

Unsigned16 Cpu::_l2_data_tlb_4m_entries [static, private]
 

Unsigned16 Cpu::_l2_inst_tlb_4k_entries [static, private]
 

Unsigned16 Cpu::_l2_inst_tlb_4m_entries [static, private]
 

Unsigned32 Cpu::_local_features [static, private]
 

char Cpu::_model_str [static, private]
 

Cpu::Vendor Cpu::_vendor [static, private]
 

Unsigned32 Cpu::_version [static, private]
 

Cpu::Vendor_table const Cpu::amd_table [static, private]
 

Cpu::Vendor_table const Cpu::cyrix_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x440, 0xFFFF, "Gx86 (Media GX)"                 },
  { 0xFF0, 0x490, 0xFFFF, "5x86"                            },
  { 0xFF0, 0x520, 0xFFFF, "6x86 (M1)"                       },
  { 0xFF0, 0x540, 0xFFFF, "GXm"                             },
  { 0xFF0, 0x600, 0xFFFF, "6x86MX (M2)"                     },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

Cpu::Cache_table const Cpu::intel_cache_table [static, private]
 

Vendor_table const Cpu::intel_table[] [static, private]
 

Cpu::Vendor_table const Cpu::nexgen_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x500, 0xFFFF, "Nx586"                           },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

Cpu::Vendor_table const Cpu::nsc_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x540, 0xFFFF, "Geode GX1"                       },
  { 0xFF0, 0x550, 0xFFFF, "Geode GX2"                       },
  { 0xFF0, 0x680, 0xFFFF, "Geode NX"                        },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

struct Cpu::Vendor_table Cpu::packed [private]
 

Cpu::Vendor_table const Cpu::rise_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x500, 0xFFFF, "mP6 (iDragon)"                   },
  { 0xFF0, 0x520, 0xFFFF, "mP6 (iDragon)"                   },
  { 0xFF0, 0x580, 0xFFFF, "mP6 (iDragon II)"                },
  { 0xFF0, 0x590, 0xFFFF, "mP6 (iDragon II)"                },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

Unsigned32 Cpu::scaler_ns_to_tsc [static, private]
 

Unsigned32 Cpu::scaler_tsc_to_ns [static, private]
 

Unsigned32 Cpu::scaler_tsc_to_us [static, private]
 

Cpu::Vendor_table const Cpu::sis_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x500, 0xFFFF, "55x"                             },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

Cpu::Vendor_table const Cpu::transmeta_table [static, private]
 

Initial value:

{
  { 0xFFF, 0x542, 0xFFFF, "TM3x00 (Crusoe)"                 },
  { 0xFFF, 0x543, 0xFFFF, "TM5x00 (Crusoe)"                 },
  { 0xFF0, 0xf20, 0xFFFF, "TM8x00 (Efficeon)"               },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

Tss * Cpu::tss_dbf [static, private]
 

Cpu::Vendor_table const Cpu::umc_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x410, 0xFFFF, "U5D"                             },
  { 0xFF0, 0x420, 0xFFFF, "U5S"                             },
  { 0x0,   0x0,   0xFFFF, ""                                }
}

char *const Cpu::vendor_ident [static, private]
 

Initial value:

{
   0,
  "GenuineIntel",
  "AuthenticAMD",
  "CyrixInstead",
  "CentaurHauls",
  "UMC UMC UMC ",
  "NexGenDriven",
  "RiseRiseRise",
  "GenuineTMx86",
  "SiS SiS SiS ",
  "Geode by NSC"
}

Cpu::Vendor_table const *const Cpu::vendor_table [static, private]
 

Initial value:

Cpu::Vendor_table const Cpu::via_table [static, private]
 

Initial value:

{
  { 0xFF0, 0x540, 0xFFFF, "IDT Winchip C6"                  },
  { 0xFF0, 0x580, 0xFFFF, "IDT Winchip 2A/B"                },
  { 0xFF0, 0x590, 0xFFFF, "IDT Winchip 3"                   },
  { 0xFF0, 0x650, 0xFFFF, "Via Jalapeno (Joshua)"           },
  { 0xFF0, 0x660, 0xFFFF, "Via C5A (Samuel)"                },
  { 0xFF8, 0x670, 0xFFFF, "Via C5B (Samuel 2)"              },
  { 0xFF8, 0x678, 0xFFFF, "Via C5C (Ezra)"                  },
  { 0xFF0, 0x680, 0xFFFF, "Via C5N (Ezra-T)"                },
  { 0xFF0, 0x690, 0xFFFF, "Via C5P (Nehemiah)"              },
  { 0xFF0, 0x6a0, 0xFFFF, "Via C5J (Esther)"                },
  { 0x0,   0x0,   0xFFFF, ""                                }
}


The documentation for this class was generated from the following files:
Generated on Mon Sep 26 14:20:14 2005 for Fiasco by  doxygen 1.4.2