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rdtsc.h

/* (c) 2003 Technische Universitaet Dresden
 * This file is part of DROPS, which is distributed under the terms of the
 * GNU General Public License 2. Please see the COPYING file for details. */

#ifndef __l4_rdtsc_h
#define __l4_rdtsc_h

#include <l4/sys/compiler.h>
#include <l4/sys/l4int.h>

EXTERN_C_BEGIN

/* interface */

#define L4_TSC_INIT_AUTO             0
#define L4_TSC_INIT_KERNEL           1
#define L4_TSC_INIT_CALIBRATE        2

extern l4_uint32_t l4_scaler_tsc_to_ns;
extern l4_uint32_t l4_scaler_tsc_to_us;
extern l4_uint32_t l4_scaler_ns_to_tsc;
extern l4_uint32_t l4_scaler_tsc_linux;

L4_INLINE l4_cpu_time_t
l4_rdtsc (void);

L4_INLINE l4_cpu_time_t
l4_rdpmc (int nr);

/* the same, but only 32 bit. Useful for smaller differences,
   needs less cycles. */
L4_INLINE
l4_uint32_t l4_rdpmc_32(int nr);

L4_INLINE l4_uint64_t
l4_tsc_to_ns (l4_cpu_time_t tsc);

L4_INLINE l4_uint64_t
l4_tsc_to_us (l4_cpu_time_t tsc);

L4_INLINE void
l4_tsc_to_s_and_ns (l4_cpu_time_t tsc, l4_uint32_t *s, l4_uint32_t *ns);

L4_INLINE l4_cpu_time_t
l4_ns_to_tsc (l4_uint64_t ns);

L4_INLINE void
l4_busy_wait_ns (l4_uint64_t ns);

L4_INLINE void
l4_busy_wait_us (l4_uint64_t us);

EXTERN_C_BEGIN

L4_INLINE l4_uint32_t
l4_calibrate_tsc (void);

L4_CV l4_uint32_t
l4_tsc_init (int constraint);

L4_CV l4_uint32_t
l4_get_hz (void);

EXTERN_C_END

/* implementaion */

L4_INLINE l4_uint32_t
l4_calibrate_tsc (void)
{
  return l4_tsc_init(L4_TSC_INIT_AUTO);
}

L4_INLINE l4_cpu_time_t
l4_rdtsc (void)
{
    l4_cpu_time_t v;
    
    __asm__ __volatile__ 
        (".byte 0x0f, 0x31              \n\t"
         "mov   $0xffffffff, %%rcx      \n\t" /* clears the upper 32 bits! */
         "and   %%rcx,%%rax             \n\t"
         "shlq  $32,%%rdx               \n\t"
         "orq   %%rdx,%%rax             \n\t"
        :
        "=a" (v)
        : /* no inputs */
        :"rdx", "rcx"
        );
    
    return v;
}

L4_INLINE l4_cpu_time_t
l4_rdpmc (int nr)
{
    l4_cpu_time_t v;
    l4_uint64_t dummy;

    __asm__ __volatile__ (
         "rdpmc                         \n\t"
         "mov   $0xffffffff, %%rcx      \n\t" /* clears the upper 32 bits! */
         "and   %%rcx,%%rax             \n\t"
         "shlq  $32,%%rdx               \n\t"
         "orq   %%rdx,%%rax             \n\t"
        :
        "=a" (v), "=c"(dummy)
        : "c" (nr)
        : "rdx"
        );

    return v;
}

/* the same, but only 32 bit. Useful for smaller differences */
L4_INLINE
l4_uint32_t l4_rdpmc_32(int nr)
{
  l4_uint32_t x;
  l4_uint64_t dummy;

  __asm__ __volatile__ (
         "rdpmc                         \n\t"
         "mov   $0xffffffff, %%rcx      \n\t" /* clears the upper 32 bits! */
         "and   %%rcx,%%rax             \n\t"
       : "=a" (x), "=c"(dummy)
       : "c" (nr)
       : "rdx");

  return x;
}

/* the same, but only 32 bit. Useful for smaller differences, 
   needs less cycles. */
static inline 
l4_uint32_t l4_rdtsc_32(void)
{
  l4_uint32_t x;

  __asm__ __volatile__ (
       ".byte 0x0f, 0x31\n\t"   // rdtsc
       : "=a" (x)
       :
       : "rdx");
    
  return x;
}

L4_INLINE l4_uint64_t
l4_tsc_to_ns (l4_cpu_time_t tsc)
{
    l4_uint64_t ns, dummy;
    __asm__
        ("                              \n\t"
         "mulq  %3                      \n\t"
         "shrd  $27, %%rdx, %%rax       \n\t"
        :"=a" (ns), "=d"(dummy)
        :"a" (tsc), "r" ((l4_uint64_t)l4_scaler_tsc_to_ns)
        );
    return ns;
}

L4_INLINE l4_uint64_t
l4_tsc_to_us (l4_cpu_time_t tsc)
{
    l4_uint64_t ns, dummy;
    __asm__
        ("                              \n\t"
         "mulq  %3                      \n\t"
         "shrd  $32, %%rdx, %%rax       \n\t"
        :"=a" (ns), "=d" (dummy)
        :"a" (tsc), "r" ((l4_uint64_t)l4_scaler_tsc_to_us)
        );
    return ns;
}

L4_INLINE void
l4_tsc_to_s_and_ns (l4_cpu_time_t tsc, l4_uint32_t *s, l4_uint32_t *ns)
{
    __asm__
        ("                              \n\t"
         "mulq  %3                      \n\t"
         "shrd  $27, %%rdx, %%rax       \n\t"
         "xorq  %%rdx, %%rdx            \n\t"
         "divq  %4                      \n\t"
        :"=a" (*s), "=&d" (*ns)
        : "a" (tsc), "r" ((l4_uint64_t)l4_scaler_tsc_to_ns),
          "rm"(1000000000ULL)
        );
}

L4_INLINE l4_cpu_time_t
l4_ns_to_tsc (l4_uint64_t ns)
{
    l4_uint64_t tsc, dummy;
    __asm__
        ("                              \n\t"
         "mulq  %3                      \n\t"
         "shrd  $27, %%rdx, %%rax       \n\t"
        :"=a" (tsc), "=d" (dummy)
        :"a" (ns), "r" ((l4_uint64_t)l4_scaler_ns_to_tsc)
        );
    return tsc;
}

L4_INLINE void
l4_busy_wait_ns (l4_uint64_t ns)
{
  l4_cpu_time_t stop = l4_rdtsc();
  stop += l4_ns_to_tsc(ns);
  
  while (l4_rdtsc() < stop)
    ;
}

L4_INLINE void
l4_busy_wait_us (l4_uint64_t us)
{
  l4_cpu_time_t stop = l4_rdtsc ();
  stop += l4_ns_to_tsc(us*1000ULL);
  
  while (l4_rdtsc() < stop)
    ;
}

EXTERN_C_END

#endif /* __l4_rdtsc_h */

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