The L4 µ-Kernel Family

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The final version of the L4 ABI definition, version 2, for x86 CPUs. L4/x86, LN, and Fiasco all implement this interface. This is the most up-to-date ``stable'' L4 interface at this time.

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An experimental L4 specification, version X.2. This specification signifies a big step towards the upcoming ``stable'' specification, version 4. Currently, there are no implementations of this specification; L4KA is busy building a reference implementation, the Pistachio kernel.

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The current version of the L4 ABI definition, ``experimental'' version X.0, for x86 CPUs. L4 version X and L4KA's Hazelnut kernel implements this ABI. ABI Version X.0 is a successor to the version 2 ABI, but is not intended for production environments. We see it as a step towards an upcoming ABI, version 4.

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Introduces the new version X.0 L4 interface, and explains the differences to version 2.

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L4 ABI definition, version 2, for the Alpha 21x64 CPUs. L4/Alpha implements this interface.

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L4 ABI definition, version 2, for the MIPS R4x00 CPUs. L4/MIPS implements this interface.

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C API for L4 version 2, for the x86 CPUs.

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DICE is the DROPS IDL compiler. It is a very flexible IDL compiler with a Flick compatibility mode. On this website you can find:

• DICE User's Manual
• DICE Tutorial
• DICE Programmer's Manual
• DICE Reference Manual

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IDL4 is L4KA's experimental high-performance IDL compiler.

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In the past, we have been using Utah's Flick IDL compiler, which we customized with an L4 backend. This webpage describes Flick in general (without the L4 backend.)

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RMGR, the L4 resource manager, is a system bootstrapper and manager of basic system resources such as IRQs, memory, and priorities.

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This report proposes to hide the specifics of interrupt acknowledgement behind a C API called Omega0. Omega0 implementations can use kernel support, use a user-level server, or be implemented solely in library space as necessary.

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This report explains the dataspace concept known from L3, and shows how to implement it using L4 primitives.

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The L4 Environment Library is a collection of functions and glue code to support applications which use the Common L4 Environment.

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This library provides an abstraction of the L4 system call interface and to eases the usage of threads, particularly by providing functionality to allocate and release the stacks of threads.

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This package provides a simple counting semaphore implementation for L4.

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A simple, semaphore-based lock implementation.

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The region mapper is the part of the L4 environment which manages the virtual address space of a task. Each task has its own region mapper thread, which is automatically started by the setup code of a task. The region mapper allows the application to bind dataspaces to a region of the address space, and it provides the pager for all other threads of the task.

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This package consists of two parts, the generic definition of the dataspace manager interfaces and the implementation of DMphys, a dataspace manager which handles the phys. memory of a system.

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Design and implementation of the L4 loader that can be used to load and run native L4 tasks.

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The loader can start and kill L4 tasks. L4 Tasks can depend on shared libraries which will be loaded on startup. Clients can start L4 tasks by using the IDL interface. This is demonstrated on simple L4Linux clients which allows to handle L4 tasks from L4Linux.

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This paper describes L⁴Linux, a port of the Linux kernel to the L4 microkernel. It also dispels the myth that microkernels can excel only in microbenchmarks, but suck in application benchmarks.

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The Perseus project aims at putting support servers for security-sensitive applications (such as a digital-signature service) in secure compartments running besides L⁴Linux, not on top of a traditional monolithic kernel such as Linux. The goal is to isolate the security infrastructure from faults and security breaches in the Linux subsystem.

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This article introduces key concepts that distinguish second-generation microkernels such as L4 from first-generation microkernels such as Mach.

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This and the previous paper detail design issues for developing a high-performance microkernel.

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Introduces the Clans & Chiefs concept that is part of the L4 version 2 definition. This concept is likely to be replaced by a more flexible concept introduced in the next paper.

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Introduces the Transparent Monitor concept, a more flexible successor to Clans & Chiefs.

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Proposes kernel changes to prevent priority inversion and allow construction of non-trivial real-time applications.

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Discusses denial-of-service attacks against the microkernel interface, and proposes a kernel mechanism to allow safe user-level management of kernel memory.

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Proposes a kernel mechanism to allow safe user-level management of kernel memory. This paper criticizes the corresponding approach of the previous paper.

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Proposes a kernel interface for hardware-interrupt acknowledgement.

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A technique to speed up intra--address-space thread switching by not going through the kernel.

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Calypso is an implementation of an L4-kernel VM subsystem and ``mapping database'' with a number of desirable features: fast software-page-table lookup, arbitrary page-size mixtures, shared page-table subtrees, domain-based MMU protection, multi-CPU concurrency.

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This paper describes the technique used in the design of Fiasco, an L4-compatible real-time microkernel, to make Fiasco a preemptible kernel with low interrupt latency.

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This report extends previous paper's techniques for multiprocessor architectures.

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This report proposes a design technique for improved address-space--switching times on the StrongARM platform.

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This report proposes a design technique for improved address-space--switching times on the x86 platform.

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This document is an attempt to document the internal structure of L4 and its operations. It is based on the L4 implementation for the MIPS R4x00 (L4/MIPS). The document is meant as an aid in teaching operating systems internals, and as a guide for kernel implementors. While the actual code discussed is very specific to the MIPS processor, much of the overall structure and logic of L4 is quite uniform across platforms.

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This documentation describes low-level OO design and implementation of Fiasco.

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